projects
/
libreriscv.git
/ commitdiff
commit
grep
author
committer
pickaxe
?
search:
re
summary
|
shortlog
|
log
|
commit
| commitdiff |
tree
raw
|
patch
| inline |
side by side
(parent:
ca2239a
)
(no commit message)
author
lkcl
<lkcl@web>
Fri, 11 Dec 2020 16:25:29 +0000
(16:25 +0000)
committer
IkiWiki
<ikiwiki.info>
Fri, 11 Dec 2020 16:25:29 +0000
(16:25 +0000)
simple_v_extension/appendix.mdwn
patch
|
blob
|
history
diff --git
a/simple_v_extension/appendix.mdwn
b/simple_v_extension/appendix.mdwn
index d4a69b3529a925f146827c1de1449e46abd8cb65..c0cfdc15c7edcff2acb8e6fc7b1219d94a3d5c86 100644
(file)
--- a/
simple_v_extension/appendix.mdwn
+++ b/
simple_v_extension/appendix.mdwn
@@
-1458,7
+1458,7
@@
circumstances it is perfectly fine to simply have the lanes
"inactive" for predicated elements, even though it results in
less than 100% ALU utilisation.
-## Twin-predication (based on source and destination register)
+## Twin-predication (based on source and destination register)
<a name="tpred"></a>
Twin-predication is not that much different, except that that
the source is independently zero-predicated from the destination.