swr/rast: whitespace and comment cleanup
authorGeorge Kyriazis <george.kyriazis@intel.com>
Thu, 1 Feb 2018 21:37:36 +0000 (15:37 -0600)
committerGeorge Kyriazis <george.kyriazis@intel.com>
Fri, 16 Feb 2018 16:54:00 +0000 (10:54 -0600)
Reviewed-by: Bruce Cherniak <bruce.cherniak@intel.com>
src/gallium/drivers/swr/rasterizer/core/api.cpp
src/gallium/drivers/swr/rasterizer/jitter/JitManager.h

index 5e27e4d1f0b49553d5490b6f9bbf707b03a1274b..e5e9897daa22a3b17c3db39a13a07e4efd598a42 100644 (file)
@@ -921,7 +921,7 @@ void SetupPipeline(DRAW_CONTEXT *pDC)
     };
 
 
-    // disable clipper if viewport transform is disabled
+    // Disable clipper if viewport transform is disabled
     if (pState->state.frontendState.vpTransformDisable)
     {
         pState->pfnProcessPrims = pfnBinner;
@@ -930,6 +930,7 @@ void SetupPipeline(DRAW_CONTEXT *pDC)
 #endif
     }
 
+    // Disable rasterizer and backend if no pixel, no depth/stencil, and no attributes
     if ((pState->state.psState.pfnPixelShader == nullptr) &&
         (pState->state.depthStencilState.depthTestEnable == FALSE) &&
         (pState->state.depthStencilState.depthWriteEnable == FALSE) &&
index ddd6864051cd0e064e4ebd4ecadc2d8b30c792d6..3660249d421966c6d55f4599209de6ecf5d21c1a 100644 (file)
@@ -136,38 +136,38 @@ struct JitManager
     JitCache                mCache;
 
     // Need to be rebuilt after a JIT and before building new IR
-    llvm::Module* mpCurrentModule;
-    bool mIsModuleFinalized;
-    uint32_t mJitNumber;
+    llvm::Module*           mpCurrentModule;
+    bool                    mIsModuleFinalized;
+    uint32_t                mJitNumber;
 
-    uint32_t                 mVWidth;
+    uint32_t                mVWidth;
 
 
     // Built in types.
-    llvm::Type*                mInt8Ty;
-    llvm::Type*                mInt32Ty;
-    llvm::Type*                mInt64Ty;
-    llvm::Type*                mFP32Ty;
+    llvm::Type*             mInt8Ty;
+    llvm::Type*             mInt32Ty;
+    llvm::Type*             mInt64Ty;
+    llvm::Type*             mFP32Ty;
 
-    llvm::Type* mSimtFP32Ty;
-    llvm::Type* mSimtInt32Ty;
+    llvm::Type*             mSimtFP32Ty;
+    llvm::Type*             mSimtInt32Ty;
 
-    llvm::Type* mSimdVectorInt32Ty;
-    llvm::Type* mSimdVectorTy;
+    llvm::Type*             mSimdVectorInt32Ty;
+    llvm::Type*             mSimdVectorTy;
 
 #if USE_SIMD16_SHADERS
-    llvm::Type* mSimd16FP32Ty;
-    llvm::Type* mSimd16Int32Ty;
+    llvm::Type*             mSimd16FP32Ty;
+    llvm::Type*             mSimd16Int32Ty;
 
-    llvm::Type* mSimd16VectorFP32Ty;
-    llvm::Type* mSimd16VectorInt32Ty;
+    llvm::Type*             mSimd16VectorFP32Ty;
+    llvm::Type*             mSimd16VectorInt32Ty;
 
 #endif
     // fetch shader types
-    llvm::FunctionType*        mFetchShaderTy;
+    llvm::FunctionType*     mFetchShaderTy;
 
-    JitInstructionSet mArch;
-    std::string mCore;
+    JitInstructionSet       mArch;
+    std::string             mCore;
 
     // Debugging support
     std::unordered_map<llvm::StructType*, llvm::DIType*> mDebugStructMap;