(no commit message)

diff --git a/3d_gpu/architecture/dynamic_simd.mdwn b/3d_gpu/architecture/dynamic_simd.mdwn
index 904211b8004ad41d34d4f096586420d0d5f8b157..d16ddff5630fd05fe304d8ea942893cfd8bae3ef 100644 (file)
--- a/3d_gpu/architecture/dynamic_simd.mdwn
+++ b/3d_gpu/architecture/dynamic_simd.mdwn
@@ -24,10 +24,13 @@ overrides.
 
 * To extend nmigen "Type 1 (ast.*)" low-level language constructs
   with `Value.__Cat__`, `Value.__Switch__`, `Value.__Repl__` etc.
-* To rename `ast.Cat` etc to `ast._InternalCat`
-* In an identical conceptual fashion as python `operator.add`
-  to redirect `ast.Cat` to `Value.__Cat__` etc.
-* To have `Value.__Cat__` etc call the now-renamed `ast._InternalCat`
+* To rename existing old `ast.Cat` etc to new `ast._InternalCat`
+* In an identical conceptual fashion, just as
+  as python `operator.add(x,y)` redirects to `x.__add__(y)`,
+  to add a new `ast.Cat(x..)` which redirects to`x.__Cat__(...)` etc.
+* To add `Value.__Cat__` etc which call the now-renamed `ast._InternalCat`
+* To allow all of the new underscore variants to be overridden without
+  limitation, restriction, or restraint.
 
 The second set of changes is targetted at Type 2 dsl.Module,
 to complete the 98% abstraction from Type 1 to a 100% level