mem: Tidy up a few variables in the bus

This patch does some minor housekeeping on the bus code, removing
redundant code, and moving the extraction of the destination id to the
top of the functions using it.

diff --git a/src/mem/coherent_bus.cc b/src/mem/coherent_bus.cc
index 1edd63b09bf99b243ece996b1294a2fc933d85b9..aa0f2797d4d7217efc8e415ae65129b259ed5590 100644 (file)
--- a/src/mem/coherent_bus.cc
+++ b/src/mem/coherent_bus.cc
@@ -199,7 +199,7 @@ CoherentBus::recvTimingReq(PacketPtr pkt, PortID slave_port_id)
 
             // update the bus state and schedule an idle event
             reqLayer.failedTiming(src_port, master_port_id,
-                                  clockEdge(Cycles(headerCycles)));
+                                  clockEdge(headerCycles));
         } else {
             // update the bus state and schedule an idle event
             reqLayer.succeededTiming(packetFinishTime);
@@ -223,9 +223,12 @@ CoherentBus::recvTimingResp(PacketPtr pkt, PortID master_port_id)
     // determine the source port based on the id
     MasterPort *src_port = masterPorts[master_port_id];
 
+    // determine the destination based on what is stored in the packet
+    PortID slave_port_id = pkt->getDest();
+
     // test if the bus should be considered occupied for the current
     // port
-    if (!respLayer.tryTiming(src_port, pkt->getDest())) {
+    if (!respLayer.tryTiming(src_port, slave_port_id)) {
         DPRINTF(CoherentBus, "recvTimingResp: src %s %s 0x%x BUSY\n",
                 src_port->name(), pkt->cmdString(), pkt->getAddr());
         return false;
@@ -249,9 +252,6 @@ CoherentBus::recvTimingResp(PacketPtr pkt, PortID master_port_id)
     // remove it as outstanding
     outstandingReq.erase(pkt->req);
 
-    // determine the destination based on what is stored in the packet
-    PortID slave_port_id = pkt->getDest();
-
     // send the packet through the destination slave port
     bool success M5_VAR_USED = slavePorts[slave_port_id]->sendTimingResp(pkt);
 

diff --git a/src/mem/noncoherent_bus.cc b/src/mem/noncoherent_bus.cc
index 5bf5cfd88368e8a8e87baab30fc1122b48c553b4..cc5d49cabf0b2924b2fdf848286732dc01d6f39d 100644 (file)
--- a/src/mem/noncoherent_bus.cc
+++ b/src/mem/noncoherent_bus.cc
@@ -138,7 +138,7 @@ NoncoherentBus::recvTimingReq(PacketPtr pkt, PortID slave_port_id)
 
         // occupy until the header is sent
         reqLayer.failedTiming(src_port, master_port_id,
-                              clockEdge(Cycles(headerCycles)));
+                              clockEdge(headerCycles));
 
         return false;
     }
@@ -160,9 +160,12 @@ NoncoherentBus::recvTimingResp(PacketPtr pkt, PortID master_port_id)
     // determine the source port based on the id
     MasterPort *src_port = masterPorts[master_port_id];
 
+    // determine the destination based on what is stored in the packet
+    PortID slave_port_id = pkt->getDest();
+
     // test if the bus should be considered occupied for the current
     // port
-    if (!respLayer.tryTiming(src_port, pkt->getDest())) {
+    if (!respLayer.tryTiming(src_port, slave_port_id)) {
         DPRINTF(NoncoherentBus, "recvTimingResp: src %s %s 0x%x BUSY\n",
                 src_port->name(), pkt->cmdString(), pkt->getAddr());
         return false;
@@ -179,11 +182,8 @@ NoncoherentBus::recvTimingResp(PacketPtr pkt, PortID master_port_id)
     calcPacketTiming(pkt);
     Tick packetFinishTime = pkt->busLastWordDelay + curTick();
 
-    // determine the destination based on what is stored in the packet
-    PortID slave_port_id = pkt->getDest();
-
     // send the packet through the destination slave port
-    bool success M5_VAR_USED = slavePorts[pkt->getDest()]->sendTimingResp(pkt);
+    bool success M5_VAR_USED = slavePorts[slave_port_id]->sendTimingResp(pkt);
 
     // currently it is illegal to block responses... can lead to
     // deadlock