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sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2): Use any_fp_register_operand...
authorUros Bizjak <ubizjak@gmail.com>
Sat, 14 Oct 2017 09:31:29 +0000 (11:31 +0200)
committerUros Bizjak <uros@gcc.gnu.org>
Sat, 14 Oct 2017 09:31:29 +0000 (11:31 +0200)
* config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2):
Use any_fp_register_operand as operand[3] predicate.  Simplify
equality test for operands[2] and operands[4] memory location.
(LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto.
(FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): New.
(LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto.
(FILD_ATOMIC/FIST_ATOMIC FP store peephole2): Use
any_fp_register_operand as operand[1] predicate.  Simplify
equality test for operands[0] and operands[3] memory location.
(LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto.
(FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): New.
(LDX_ATOMIC/LDX_ATOMIC FP storepeephole2 with mem blockage): Ditto.

From-SVN: r253751

gcc/ChangeLog patch | blob | history
gcc/config/i386/sync.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 53edcc367e7a1dddd0ca0bdb8a2fa86437717a78..212df0ff1d2a71317c4379b749abf65c7898deb4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,18 @@
+2017-10-14  Uros Bizjak  <ubizjak@gmail.com>
+
+       * config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2):
+       Use any_fp_register_operand as operand[3] predicate.  Simplify
+       equality test for operands[2] and operands[4] memory location.
+       (LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto.
+       (FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): New.
+       (LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto.
+       (FILD_ATOMIC/FIST_ATOMIC FP store peephole2): Use
+       any_fp_register_operand as operand[1] predicate.  Simplify
+       equality test for operands[0] and operands[3] memory location.
+       (LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto.
+       (FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): New.
+       (LDX_ATOMIC/LDX_ATOMIC FP storepeephole2 with mem blockage): Ditto.
+
 2017-10-14  Uros Bizjak  <ubizjak@gmail.com>
 
        * target-insns.def: Add memory_blockage.
diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md
index 29b82f86d43a07f128082d292ba726c59192b5bb..eceaa73a6799150439697d845ce1f0bc9140a94b 100644 (file)
--- a/gcc/config/i386/sync.md
+++ b/gcc/config/i386/sync.md
@@ -219,14 +219,35 @@
    (set (match_operand:DI 2 "memory_operand")
        (unspec:DI [(match_dup 0)]
                   UNSPEC_FIST_ATOMIC))
-   (set (match_operand:DF 3 "fp_register_operand")
+   (set (match_operand:DF 3 "any_fp_register_operand")
        (match_operand:DF 4 "memory_operand"))]
   "!TARGET_64BIT
    && peep2_reg_dead_p (2, operands[0])
-   && rtx_equal_p (operands[4], adjust_address_nv (operands[2], DFmode, 0))"
+   && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))"
   [(set (match_dup 3) (match_dup 5))]
   "operands[5] = gen_lowpart (DFmode, operands[1]);")
 
+(define_peephole2
+  [(set (match_operand:DF 0 "fp_register_operand")
+       (unspec:DF [(match_operand:DI 1 "memory_operand")]
+                  UNSPEC_FILD_ATOMIC))
+   (set (match_operand:DI 2 "memory_operand")
+       (unspec:DI [(match_dup 0)]
+                  UNSPEC_FIST_ATOMIC))
+   (set (mem:BLK (scratch:SI))
+       (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE))
+   (set (match_operand:DF 3 "any_fp_register_operand")
+       (match_operand:DF 4 "memory_operand"))]
+  "!TARGET_64BIT
+   && peep2_reg_dead_p (2, operands[0])
+   && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))"
+  [(const_int 0)]
+{
+  emit_move_insn (operands[3], gen_lowpart (DFmode, operands[1]));
+  emit_insn (gen_memory_blockage ());
+  DONE;
+})
+
 (define_peephole2
   [(set (match_operand:DF 0 "sse_reg_operand")
        (unspec:DF [(match_operand:DI 1 "memory_operand")]
@@ -234,14 +255,35 @@
    (set (match_operand:DI 2 "memory_operand")
        (unspec:DI [(match_dup 0)]
                   UNSPEC_STX_ATOMIC))
-   (set (match_operand:DF 3 "fp_register_operand")
+   (set (match_operand:DF 3 "any_fp_register_operand")
        (match_operand:DF 4 "memory_operand"))]
   "!TARGET_64BIT
    && peep2_reg_dead_p (2, operands[0])
-   && rtx_equal_p (operands[4], adjust_address_nv (operands[2], DFmode, 0))"
+   && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))"
   [(set (match_dup 3) (match_dup 5))]
   "operands[5] = gen_lowpart (DFmode, operands[1]);")
 
+(define_peephole2
+  [(set (match_operand:DF 0 "sse_reg_operand")
+       (unspec:DF [(match_operand:DI 1 "memory_operand")]
+                  UNSPEC_LDX_ATOMIC))
+   (set (match_operand:DI 2 "memory_operand")
+       (unspec:DI [(match_dup 0)]
+                  UNSPEC_STX_ATOMIC))
+   (set (mem:BLK (scratch:SI))
+       (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE))
+   (set (match_operand:DF 3 "any_fp_register_operand")
+       (match_operand:DF 4 "memory_operand"))]
+  "!TARGET_64BIT
+   && peep2_reg_dead_p (2, operands[0])
+   && rtx_equal_p (XEXP (operands[4], 0), XEXP (operands[2], 0))"
+  [(const_int 0)]
+{
+  emit_move_insn (operands[3], gen_lowpart (DFmode, operands[1]));
+  emit_insn (gen_memory_blockage ());
+  DONE;
+})
+
 (define_expand "atomic_store<mode>"
   [(set (match_operand:ATOMIC 0 "memory_operand")
        (unspec:ATOMIC [(match_operand:ATOMIC 1 "nonimmediate_operand")
@@ -331,7 +373,7 @@
 
 (define_peephole2
   [(set (match_operand:DF 0 "memory_operand")
-       (match_operand:DF 1 "fp_register_operand"))
+       (match_operand:DF 1 "any_fp_register_operand"))
    (set (match_operand:DF 2 "fp_register_operand")
        (unspec:DF [(match_operand:DI 3 "memory_operand")]
                   UNSPEC_FILD_ATOMIC))
@@ -340,13 +382,34 @@
                   UNSPEC_FIST_ATOMIC))]
   "!TARGET_64BIT
    && peep2_reg_dead_p (3, operands[2])
-   && rtx_equal_p (operands[0], adjust_address_nv (operands[3], DFmode, 0))"
+   && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))"
   [(set (match_dup 5) (match_dup 1))]
   "operands[5] = gen_lowpart (DFmode, operands[4]);")
 
 (define_peephole2
   [(set (match_operand:DF 0 "memory_operand")
-       (match_operand:DF 1 "fp_register_operand"))
+       (match_operand:DF 1 "any_fp_register_operand"))
+   (set (mem:BLK (scratch:SI))
+       (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE))
+   (set (match_operand:DF 2 "fp_register_operand")
+       (unspec:DF [(match_operand:DI 3 "memory_operand")]
+                  UNSPEC_FILD_ATOMIC))
+   (set (match_operand:DI 4 "memory_operand")
+       (unspec:DI [(match_dup 2)]
+                  UNSPEC_FIST_ATOMIC))]
+  "!TARGET_64BIT
+   && peep2_reg_dead_p (4, operands[2])
+   && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))"
+  [(const_int 0)]
+{
+  emit_insn (gen_memory_blockage ());
+  emit_move_insn (gen_lowpart (DFmode, operands[4]), operands[1]);
+  DONE;
+})
+
+(define_peephole2
+  [(set (match_operand:DF 0 "memory_operand")
+       (match_operand:DF 1 "any_fp_register_operand"))
    (set (match_operand:DF 2 "sse_reg_operand")
        (unspec:DF [(match_operand:DI 3 "memory_operand")]
                   UNSPEC_LDX_ATOMIC))
@@ -355,10 +418,31 @@
                   UNSPEC_STX_ATOMIC))]
   "!TARGET_64BIT
    && peep2_reg_dead_p (3, operands[2])
-   && rtx_equal_p (operands[0], adjust_address_nv (operands[3], DFmode, 0))"
+   && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))"
   [(set (match_dup 5) (match_dup 1))]
   "operands[5] = gen_lowpart (DFmode, operands[4]);")
 
+(define_peephole2
+  [(set (match_operand:DF 0 "memory_operand")
+       (match_operand:DF 1 "any_fp_register_operand"))
+   (set (mem:BLK (scratch:SI))
+       (unspec:BLK [(mem:BLK (scratch:SI))] UNSPEC_MEMORY_BLOCKAGE))
+   (set (match_operand:DF 2 "sse_reg_operand")
+       (unspec:DF [(match_operand:DI 3 "memory_operand")]
+                  UNSPEC_LDX_ATOMIC))
+   (set (match_operand:DI 4 "memory_operand")
+       (unspec:DI [(match_dup 2)]
+                  UNSPEC_STX_ATOMIC))]
+  "!TARGET_64BIT
+   && peep2_reg_dead_p (4, operands[2])
+   && rtx_equal_p (XEXP (operands[0], 0), XEXP (operands[3], 0))"
+  [(const_int 0)]
+{
+  emit_insn (gen_memory_blockage ());
+  emit_move_insn (gen_lowpart (DFmode, operands[4]), operands[1]);
+  DONE;
+})
+
 ;; ??? You'd think that we'd be able to perform this via FLOAT + FIX_TRUNC
 ;; operations.  But the fix_trunc patterns want way more setup than we want
 ;; to provide.  Note that the scratch is DFmode instead of XFmode in order