enum radeon_heap {
RADEON_HEAP_VRAM_NO_CPU_ACCESS,
RADEON_HEAP_VRAM,
- RADEON_HEAP_VRAM_GTT, /* combined heaps */
RADEON_HEAP_GTT_WC,
RADEON_HEAP_GTT,
RADEON_MAX_SLAB_HEAPS,
case RADEON_HEAP_VRAM_NO_CPU_ACCESS:
case RADEON_HEAP_VRAM:
return RADEON_DOMAIN_VRAM;
- case RADEON_HEAP_VRAM_GTT:
- return RADEON_DOMAIN_VRAM_GTT;
case RADEON_HEAP_GTT_WC:
case RADEON_HEAP_GTT:
return RADEON_DOMAIN_GTT;
RADEON_FLAG_NO_INTERPROCESS_SHARING;
case RADEON_HEAP_VRAM:
- case RADEON_HEAP_VRAM_GTT:
case RADEON_HEAP_GTT_WC:
return RADEON_FLAG_GTT_WC |
RADEON_FLAG_NO_INTERPROCESS_SHARING;
case RADEON_HEAP_VRAM_NO_CPU_ACCESS:
return 0;
case RADEON_HEAP_VRAM:
- case RADEON_HEAP_VRAM_GTT:
return 1;
case RADEON_HEAP_GTT_WC:
return 2;
return RADEON_HEAP_VRAM_NO_CPU_ACCESS;
else
return RADEON_HEAP_VRAM;
- case RADEON_DOMAIN_VRAM_GTT:
- return RADEON_HEAP_VRAM_GTT;
case RADEON_DOMAIN_GTT:
if (flags & RADEON_FLAG_GTT_WC)
return RADEON_HEAP_GTT_WC;
else
return RADEON_HEAP_GTT;
+ default:
+ return -1;
}
- return -1;
}
#endif