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radeonsi/gfx10: set USER_DATA_ADDR offset for geometry shaders
authorNicolai Hähnle <nicolai.haehnle@amd.com>
Wed, 30 May 2018 20:45:06 +0000 (22:45 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Wed, 3 Jul 2019 19:51:12 +0000 (15:51 -0400)
Acked-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/gallium/drivers/radeonsi/si_descriptors.c patch | blob | history

diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index a9bafb1112b8c917215777e171115c285971da30..262f7e88c93bba1349e88bb27dfdd9f378f950c2 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -2752,7 +2752,10 @@ void si_init_all_descriptors(struct si_context *sctx)
                        if (i == PIPE_SHADER_TESS_CTRL) {
                                rel_dw_offset = (R_00B408_SPI_SHADER_USER_DATA_ADDR_LO_HS -
                                                 R_00B430_SPI_SHADER_USER_DATA_LS_0) / 4;
-                       } else { /* PIPE_SHADER_GEOMETRY */
+                       } else if (sctx->chip_class >= GFX10) { /* PIPE_SHADER_GEOMETRY */
+                               rel_dw_offset = (R_00B208_SPI_SHADER_USER_DATA_ADDR_LO_GS -
+                                                R_00B230_SPI_SHADER_USER_DATA_GS_0) / 4;
+                       } else {
                                rel_dw_offset = (R_00B208_SPI_SHADER_USER_DATA_ADDR_LO_GS -
                                                 R_00B330_SPI_SHADER_USER_DATA_ES_0) / 4;
                        }
@@ -2770,7 +2773,10 @@ void si_init_all_descriptors(struct si_context *sctx)
                        if (i == PIPE_SHADER_TESS_CTRL) {
                                rel_dw_offset = (R_00B40C_SPI_SHADER_USER_DATA_ADDR_HI_HS -
                                                 R_00B430_SPI_SHADER_USER_DATA_LS_0) / 4;
-                       } else { /* PIPE_SHADER_GEOMETRY */
+                       } else if (sctx->chip_class >= GFX10) { /* PIPE_SHADER_GEOMETRY */
+                               rel_dw_offset = (R_00B20C_SPI_SHADER_USER_DATA_ADDR_HI_GS -
+                                                R_00B230_SPI_SHADER_USER_DATA_GS_0) / 4;
+                       } else {
                                rel_dw_offset = (R_00B20C_SPI_SHADER_USER_DATA_ADDR_HI_GS -
                                                 R_00B330_SPI_SHADER_USER_DATA_ES_0) / 4;
                        }