i965/gen4: Simplify depth/stencil invalidate check
authorTopi Pohjolainen <topi.pohjolainen@intel.com>
Fri, 19 May 2017 08:04:54 +0000 (11:04 +0300)
committerTopi Pohjolainen <topi.pohjolainen@intel.com>
Sun, 18 Jun 2017 07:46:44 +0000 (10:46 +0300)
There is no separate stencil on gen < 6.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
src/mesa/drivers/dri/i965/brw_misc_state.c

index 93188223808c284e61f8f51793a97b4de54824c8..df26cd74036c7955f2ffc16ebf5adc6db9191b3b 100644 (file)
@@ -231,21 +231,11 @@ brw_workaround_depthstencil_alignment(struct brw_context *brw,
       return;
 
    /* Check if depth buffer is in depth/stencil format.  If so, then it's only
-    * safe to invalidate it if we're also clearing stencil, and both depth_irb
-    * and stencil_irb point to the same miptree.
-    *
-    * Note: it's not sufficient to check for the case where
-    * _mesa_get_format_base_format(depth_mt->format) == GL_DEPTH_STENCIL,
-    * because this fails to catch depth/stencil buffers on hardware that uses
-    * separate stencil.  To catch that case, we check whether
-    * depth_mt->stencil_mt is non-NULL.
+    * safe to invalidate it if we're also clearing stencil.
     */
    if (depth_irb && invalidate_depth &&
-       (_mesa_get_format_base_format(depth_mt->format) == GL_DEPTH_STENCIL ||
-        depth_mt->stencil_mt)) {
-      invalidate_depth = invalidate_stencil && depth_irb && stencil_irb
-         && depth_irb->mt == stencil_irb->mt;
-   }
+      _mesa_get_format_base_format(depth_mt->format) == GL_DEPTH_STENCIL)
+      invalidate_depth = invalidate_stencil && stencil_irb;
 
    uint32_t tile_mask_x, tile_mask_y;
    brw_get_depthstencil_tile_masks(depth_mt,