MIPS/include: opcode/mips.h: Update stale comment for CODE20 operand

Complement commit 1586d91e32ea ("/ 0 should send SIGFPE not SIGTRAP..."),
<https://sourceware.org/ml/binutils/2004-07/msg00260.html>, and update a
stale comment referring the 20-bit code field of the BREAK and SDBBP
instructions, by making it explicit that where permitted by choosing the
MIPS32 or a later ISA the whole field can now be set with a single
operand for the SDBBP instruction only.

	include/
	* opcode/mips.h: Update comment for MIPS32 CODE20 operand.

diff --git a/include/ChangeLog b/include/ChangeLog
index 038a070f28542fa5738db8caeaa1698b06479cd6..01bb9207a875526ec1089a1b7f23f79ebd072791 100644 (file)
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2019-04-25  Maciej W. Rozycki  <macro@linux-mips.org>
+
+       * opcode/mips.h: Update comment for MIPS32 CODE20 operand.
+
 2019-04-15  Sudakshina Das  <sudi.das@arm.com>
 
        * elf/arm.h (START_RELOC_NUMBERS): New entry for R_ARM_THM_BF12.

diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index abd52c89800cc4b929adacfd55952d14f9653257..4309e1a348f040fd997e8e5fc47ccd66b66cd60f 100644 (file)
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -56,8 +56,8 @@ extern "C" {
    code field in BREAK is 20 bits; yet MIPS assemblers and debuggers
    only use ten bits).  An optional two-operand form of break/sdbbp
    allows the lower ten bits to be set too, and MIPS32 and later
-   architectures allow 20 bits to be set with a signal operand
-   (using CODE20).
+   architectures allow 20 bits to be set with a single operand for
+   the sdbbp instruction (using CODE20).
 
    The syscall instruction uses CODE20.