std::map<std::string, AstNode*> current_scope;
const dict<RTLIL::SigBit, RTLIL::SigBit> *genRTLIL_subst_ptr = NULL;
RTLIL::SigSpec ignoreThisSignalsInInitial;
- std::map<RTLIL::SigSpec, RTLIL::Cell*> wire_logic_map;
AstNode *current_always, *current_top_block, *current_block, *current_block_child;
AstModule *current_module;
bool current_always_clocked;
log("--- END OF AST DUMP ---\n");
}
- wire_logic_map = std::map<RTLIL::SigSpec, RTLIL::Cell*>();
-
if (!defer)
{
bool blackbox_module = flag_lib;
extern std::map<std::string, AST::AstNode*> current_scope;
extern const dict<RTLIL::SigBit, RTLIL::SigBit> *genRTLIL_subst_ptr;
extern RTLIL::SigSpec ignoreThisSignalsInInitial;
- extern std::map<RTLIL::SigSpec, RTLIL::Cell*> wire_logic_map;
extern AST::AstNode *current_always, *current_top_block, *current_block, *current_block_child;
extern AST::AstModule *current_module;
extern bool current_always_clocked;