Fix existing fold-vec-extract-longlong.p8.c testcase
authorWill Schmidt <will_schmidt@vnet.ibm.com>
Mon, 17 Feb 2020 16:22:38 +0000 (10:22 -0600)
committerWill Schmidt <will_schmidt@vnet.ibm.com>
Mon, 17 Feb 2020 16:24:50 +0000 (10:24 -0600)
    The code generated by this test changed shortly after
    this test was committed, and we didn't get back to
    updating the scan-assembler statements to match.
    Until now.

[testsuite]
    * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Correct
    number of expected insns.

gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c

index 0de8adf70e34ab4e12f6f7e6bb34ebee6781f6b6..12390746bd5d141669c2d04678fe25844ef7b38d 100644 (file)
@@ -1,3 +1,8 @@
+2020-02-17  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+       * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Correct
+       number of expected insns.
+
 2020-02-17  Martin Liska  <mliska@suse.cz>
 
        PR ipa/93760
index e8aabd07199a01e7207b535708f10d481db9d012..2784d80dabe0c83dc2828aa4a7123a0840cb2d53 100644 (file)
@@ -5,25 +5,26 @@
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8 -O2" } */
 
-// targeting P8, both LE and BE. six tests.
+// Targeting P8LE and P8BE, six tests total.
 // P8 (LE) constants: mfvsrd
-// P8 (LE) variables: xori, rldic, mtvsrd, xxpermdi, vslo, mfvsrd
-// P8 (BE) constants: xxpermdi, mfvsrd
-// P8 (BE) Variables:       rldic, mtvsrd, xxpermdi, vslo, mfvsrd
+// P8 (LE) variables: addi,xxpermdi,mr,stxvd2x|stxvd4x,rldicl,sldi,ldx,blr
+// P8 (BE) constants: mfvsrd
+// P8 (BE) Variables: addi,xxpermdi,rldicl,mr,stxvd2x|stxvd4x,sldi,ldx,blr
 
-/* results. */
-/* { dg-final { scan-assembler-times {\mxori\M} 3 { target le } } } */
-/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
-/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\maddi\M} 3 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlwz\M} 11 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target le } } } */
-/* { dg-final { scan-assembler-times {\mxxpermdi\M} 6 { target { be && lp64 } } } } */
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 2 { target { be && ilp32 } } } } */
-/* { dg-final { scan-assembler-times {\mvslo\M} 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target { be && lp64 } } } } */
+/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */
+/* { dg-final { scan-assembler-times {\mrldicl\M|\mrldic\M|\mrlwinm\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mmfvsrd\M} 3 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times {\mmfvsrd\M} 0 { target { be && ilp32 } } } } */
+/* { dg-final { scan-assembler-times {\mmtvsrd\M} 0 { target { lp64 } } } } */
+/* { dg-final { scan-assembler-times {\mmtvsrd\M} 0 { target { be && ilp32 } } } } */
 
 #include <altivec.h>