pan/mdg: Round up bytemasks when spilling
authorAlyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Mon, 11 May 2020 17:49:03 +0000 (13:49 -0400)
committerMarge Bot <eric+marge@anholt.net>
Thu, 21 May 2020 17:49:14 +0000 (17:49 +0000)
So we can pack the spills for <32-bit types.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/5151>

src/panfrost/midgard/midgard_ra.c

index e4901eed6386667b3e95320e8ffa434545003de3..1ba193b7879a7c1502d8feb87101a46e55b767d0 100644 (file)
@@ -292,7 +292,8 @@ mir_lower_special_reads(compiler_context *ctx)
                                 } else {
                                         idx = spill_idx++;
                                         m = v_mov(i, idx);
-                                        m.mask = mir_from_bytemask(mir_bytemask_of_read_components(pre_use, i), 32);
+                                        m.mask = mir_from_bytemask(mir_round_bytemask_up(
+                                                                mir_bytemask_of_read_components(pre_use, i), 32), 32);
                                         mir_insert_instruction_before(ctx, pre_use, m);
                                         mir_rewrite_index_src_single(pre_use, i, idx);
                                 }
@@ -920,7 +921,8 @@ mir_spill_register(
                                 /* Mask the load based on the component count
                                  * actually needed to prevent RA loops */
 
-                                st.mask = mir_from_bytemask(read_bytemask, 32);
+                                st.mask = mir_from_bytemask(mir_round_bytemask_up(
+                                                        read_bytemask, 32), 32);
 
                                 mir_insert_instruction_before_scheduled(ctx, block, before, st);
                         } else {