fix fsgn elwidth
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 7 Nov 2018 09:24:12 +0000 (09:24 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 7 Nov 2018 09:24:12 +0000 (09:24 +0000)
id_regs.py

index a1fdf6773d826244a3ab9bf9d7f9b3ef66fd7fcf..035ae433f4f549a7d8ccc8febd09ce2950600953 100644 (file)
@@ -100,13 +100,16 @@ def find_registers(fname, insn, twin_predication, immed_offset, is_branch):
                 dest_flen = 64
             elif split[1].startswith('q'):
                 dest_flen = 128
-        if "f128(" in f:
+        if "f128(" in f or \
+                insn.startswith('fsgn') and insn.endswith('q'):
             src_flen = 128
             dest_flen = 128
-        elif "f64(" in f or insn == 'fsd':
+        elif "f64(" in f or insn == 'fsd' or \
+                insn.startswith('fsgn') and insn.endswith('d'):
             src_flen = 64
             dest_flen = 64
-        elif "f32(" in f or insn == 'fsw':
+        elif "f32(" in f or insn == 'fsw' or \
+                insn.startswith('fsgn') and insn.endswith('s'):
             src_flen = 32
             dest_flen = 32
         for pattern in patterns: