Clarify MVL vs RVV

diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn
index 9c027387c66539348c9c82564fbc0fb9c59702e8..c2230125b646753c742b26aae92aa6120b1f8ce1 100644 (file)
--- a/openpower/sv/setvl.mdwn
+++ b/openpower/sv/setvl.mdwn
@@ -28,6 +28,9 @@ how much of the regfile do you want to allocate to this operation?" because if i
 The answer effectively needs to be parameterised.  Hence: MAXVL
 (MVL) is set from an immediate, so that the compiler may decide, statically, a guaranteed resource allocation according to the needs of the application.
 
+While RVV's MAXVL was a hw limit, SV's MVL is simply a loop optimization. It does not carry
+side-effects for the arch, though for a specific cpu it may affect hw unit usage.
+
 Other than being able to set MVL, SV's VL (Vector Length) works just like RVV's VL, with one minor twist.  RVV permits the `setvl` instruction to set VL to an arbitrary value.  Given that RVV only works on Vector Loops, this is fine and part of its value and design.  However, SV sits on top of the standard register files.  When MVL=VL=2, a Vector Add on `r3` will perform two Scalar Adds: one on `r3` and one on `r4`.
 
 Thus there is the opportunity to set VL to an explicit value (within the limits of MVL) with the reasonable expectation that if two operations are requested (by setting VL=2) then two operations are guaranteed.  This avoids the need for a loop (with not-insignificant use of the regfiles for counters), simply two