Put the mode in the ExtMachInst.
authorGabe Black <gblack@eecs.umich.edu>
Thu, 14 Jun 2007 13:50:58 +0000 (13:50 +0000)
committerGabe Black <gblack@eecs.umich.edu>
Thu, 14 Jun 2007 13:50:58 +0000 (13:50 +0000)
--HG--
extra : convert_revision : 7fc6567ab3d35c06901e6c8a0435f7cab819e17e

src/arch/x86/predecoder.cc
src/arch/x86/predecoder.hh
src/arch/x86/types.hh
src/arch/x86/utility.hh

index 5c98a1831664d183f1fd6919849ac5eac21ce2c6..72b60385b9097bb52561e8313c9c32b8a9441e3d 100644 (file)
@@ -77,6 +77,7 @@ namespace X86ISA
 
         emi.modRM = 0;
         emi.sib = 0;
+        emi.mode = 0;
     }
 
     void Predecoder::process()
index 0708875c15459a394c3faee9faa2db9b7ed45bcb..3c858f061cbed9a811e20e497e9984b5a6209813 100644 (file)
@@ -176,7 +176,10 @@ namespace X86ISA
             tc(_tc), basePC(0), origPC(0), offset(0),
             outOfBytes(true), emiIsReady(false),
             state(ResetState)
-        {}
+        {
+            emi.mode.mode = LongMode;
+            emi.mode.submode = SixtyFourBitMode;
+        }
 
         ThreadContext * getTC()
         {
index 22525835864ef0596a6dc389c329ce03eb89972a..fc9f1d82b15a29503193385714ea57defce1742d 100644 (file)
@@ -120,6 +120,24 @@ namespace X86ISA
         Bitfield<2,0> bottom3;
     EndBitUnion(Opcode)
 
+    BitUnion8(OperatingMode)
+        Bitfield<3> mode;
+        Bitfield<2,0> submode;
+    EndBitUnion(OperatingMode)
+
+    enum X86Mode {
+        LongMode,
+        LegacyMode
+    };
+
+    enum X86SubMode {
+        SixtyFourBitMode,
+        CompatabilityMode,
+        ProtectedMode,
+        Virtual8086Mode,
+        RealMode
+    };
+
     //The intermediate structure the x86 predecoder returns.
     struct ExtMachInst
     {
@@ -151,6 +169,9 @@ namespace X86ISA
         uint8_t opSize;
         //The effective address size.
         uint8_t addrSize;
+
+        //Mode information
+        OperatingMode mode;
     };
 
     inline static std::ostream &
@@ -172,6 +193,8 @@ namespace X86ISA
     inline static bool
         operator == (const ExtMachInst &emi1, const ExtMachInst &emi2)
     {
+        if(emi1.mode != emi2.mode)
+            return false;
         if(emi1.legacy != emi2.legacy)
             return false;
         if(emi1.rex != emi2.rex)
index 1c98e7fbcf17505fc37843bf1c484f9dd946ca2c..ed401a519b3e4fdba3cefa40bb4c61ad80ad3d5b 100644 (file)
@@ -79,7 +79,7 @@ namespace __hash_namespace {
                     ((uint64_t)emi.opcode.prefixB << 8) |
                     ((uint64_t)emi.opcode.op)) ^
                     emi.immediate ^ emi.displacement ^
-                    emi.opSize;
+                    emi.mode ^ emi.opSize;
         };
     };
 }