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anv/icl: Don't use SingleVertexDispatch
author
Anuj Phogat
<anuj.phogat@gmail.com>
Fri, 26 May 2017 22:42:02 +0000
(15:42 -0700)
committer
Anuj Phogat
<anuj.phogat@gmail.com>
Fri, 16 Feb 2018 19:10:32 +0000
(11:10 -0800)
Signed-off-by: Anuj Phogat <anuj.phogat@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/vulkan/genX_pipeline.c
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diff --git
a/src/intel/vulkan/genX_pipeline.c
b/src/intel/vulkan/genX_pipeline.c
index 784559380db74411ad484cc0b4553fea08f818e0..85391c93cadf3f300ad37bf8a1534bd9e4fb30fe 100644
(file)
--- a/
src/intel/vulkan/genX_pipeline.c
+++ b/
src/intel/vulkan/genX_pipeline.c
@@
-1135,7
+1135,9
@@
emit_3dstate_vs(struct anv_pipeline *pipeline)
#endif
assert(!vs_prog_data->base.base.use_alt_mode);
+#if GEN_GEN < 11
vs.SingleVertexDispatch = false;
+#endif
vs.VectorMaskEnable = false;
vs.SamplerCount = get_sampler_count(vs_bin);
vs.BindingTableEntryCount = get_binding_table_entry_count(vs_bin);