Reject if (* init *) present
authorEddie Hung <eddie@fpgeh.com>
Thu, 26 Sep 2019 01:21:08 +0000 (18:21 -0700)
committerEddie Hung <eddie@fpgeh.com>
Thu, 26 Sep 2019 01:21:08 +0000 (18:21 -0700)
passes/pmgen/ice40_dsp.pmg
passes/pmgen/xilinx_dsp.pmg

index 9330dd09bc12a3276d282d07d9235461772ed1a5..6b6d2b56fc70654c32670b28c7829d0a1875bdd1 100644 (file)
@@ -333,6 +333,9 @@ code
                        reject;
                if (c.wire->get_bool_attribute(\keep))
                        reject;
+               Const init = c.wire->attributes.at(\init, State::Sx);
+               if (!init.is_fully_undef() && !init.is_fully_zero())
+                       reject;
        }
 endcode
 
index e256f7d7eab7b0ac0fbf4c29bec85adb59b0c8ac..0a345e88d4bb408c2cd8807d5290b04631bdc976 100644 (file)
@@ -355,6 +355,9 @@ code
                        reject;
                if (c.wire->get_bool_attribute(\keep))
                        reject;
+               Const init = c.wire->attributes.at(\init, State::Sx);
+               if (!init.is_fully_undef() && !init.is_fully_zero())
+                       reject;
        }
 endcode