+2016-10-07 Andrew Pinski <apinski@cavium.com>
+
+ * config/aarch64/aarch64-arches.def (AARCH64_ARCH): #undef at the end.
+ * config/aarch64/aarch64-cores.def (AARCH64_CORE): Likewise.
+ * config/aarch64/aarch64-fusion-pairs.def (AARCH64_FUSION_PAIR): Likewise.
+ * config/aarch64/aarch64-option-extensions.def (AARCH64_OPT_EXTENSION): Likewise.
+ * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION): Likewise.
+ * config/aarch64/aarch64-opts.h (AARCH64_CORE): Don't #undef here.
+ (AARCH64_ARCH): Likewise.
+ * common/config/aarch64/aarch64-common.c (AARCH64_OPT_EXTENSION): Likewise.
+ (AARCH64_CORE): Likewise.
+ (AARCH64_ARCH): Likewise.
+ * config/aarch64/aarch64-protos.h (AARCH64_FUSION_PAIR): Likewise.
+ (AARCH64_EXTRA_TUNING_OPTION): Likewise.
+ * config/aarch64/aarch64.c (AARCH64_FUION_PAIR): Likewise.
+ (AARCH64_EXTRA_TUNING_OPTION): Likewise.
+ (AARCH64_ARCH): Likewise.
+ (AARCH64_CORE): Likewise.
+ * config/aarch64/aarch64.h (AARCH64_CORE): Likewise.
+ * config/aarch64/driver-aarch64.c (AARCH64_OPT_EXTENSION): Likewise.
+ (AARCH64_CORE): Likewise.
+ (AARCH64_ARCH): Likewise.
+
2016-10-06 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Split
#define AARCH64_OPT_EXTENSION(NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF, Z) \
{NAME, FLAG_CANONICAL, FLAGS_ON, FLAGS_OFF},
#include "config/aarch64/aarch64-option-extensions.def"
-#undef AARCH64_OPT_EXTENSION
{NULL, 0, 0, 0}
};
#define AARCH64_CORE(NAME, X, IDENT, ARCH_IDENT, FLAGS, COSTS, IMP, PART) \
{NAME, AARCH64_ARCH_##ARCH_IDENT, FLAGS},
#include "config/aarch64/aarch64-cores.def"
-#undef AARCH64_CORE
{"generic", AARCH64_ARCH_8A, AARCH64_FL_FOR_ARCH8},
{"", aarch64_no_arch, 0}
};
#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH, FLAGS) \
{AARCH64_ARCH_##ARCH_IDENT, NAME, FLAGS},
#include "config/aarch64/aarch64-arches.def"
-#undef AARCH64_ARCH
{aarch64_no_arch, "", 0}
};
AARCH64_ARCH("armv8.1-a", generic, 8_1A, 8, AARCH64_FL_FOR_ARCH8_1)
AARCH64_ARCH("armv8.2-a", generic, 8_2A, 8, AARCH64_FL_FOR_ARCH8_2)
+#undef AARCH64_ARCH
AARCH64_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa72, "0x41", "0xd08.0xd03")
AARCH64_CORE("cortex-a73.cortex-a35", cortexa73cortexa35, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, "0x41", "0xd09.0xd04")
AARCH64_CORE("cortex-a73.cortex-a53", cortexa73cortexa53, cortexa53, 8A, AARCH64_FL_FOR_ARCH8 | AARCH64_FL_CRC, cortexa73, "0x41", "0xd09.0xd03")
+
+#undef AARCH64_CORE
AARCH64_FUSION_PAIR ("cmp+branch", CMP_BRANCH)
AARCH64_FUSION_PAIR ("aes+aesmc", AES_AESMC)
+#undef AARCH64_FUSION_PAIR
/* Enabling "fp16" also enables "fp".
Disabling "fp16" just disables "fp16". */
AARCH64_OPT_EXTENSION("fp16", AARCH64_FL_F16, AARCH64_FL_FP, 0, "fp16")
+
+#undef AARCH64_OPT_EXTENSION
#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
INTERNAL_IDENT,
#include "aarch64-cores.def"
-#undef AARCH64_CORE
/* Used to indicate that no processor has been specified. */
generic,
/* Used to mark the end of the processor table. */
#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
AARCH64_ARCH_##ARCH_IDENT,
#include "aarch64-arches.def"
-#undef AARCH64_ARCH
aarch64_no_arch
};
#include "aarch64-fusion-pairs.def"
AARCH64_FUSE_index_END
};
-#undef AARCH64_FUSION_PAIR
#define AARCH64_FUSION_PAIR(x, name) \
AARCH64_FUSE_##name = (1u << AARCH64_FUSE_##name##_index),
#include "aarch64-fusion-pairs.def"
AARCH64_FUSE_ALL = (1u << AARCH64_FUSE_index_END) - 1
};
-#undef AARCH64_FUSION_PAIR
#define AARCH64_EXTRA_TUNING_OPTION(x, name) \
AARCH64_EXTRA_TUNE_##name##_index,
#include "aarch64-tuning-flags.def"
AARCH64_EXTRA_TUNE_index_END
};
-#undef AARCH64_EXTRA_TUNING_OPTION
#define AARCH64_EXTRA_TUNING_OPTION(x, name) \
#include "aarch64-tuning-flags.def"
AARCH64_EXTRA_TUNE_ALL = (1u << AARCH64_EXTRA_TUNE_index_END) - 1
};
-#undef AARCH64_EXTRA_TUNING_OPTION
/* Enum describing the various ways that the
aarch64_parse_{arch,tune,cpu,extension} functions can fail.
two load/stores are not at least 8 byte aligned don't create load/store
pairs. */
AARCH64_EXTRA_TUNING_OPTION ("slow_unaligned_ldpw", SLOW_UNALIGNED_LDPW)
+
+#undef AARCH64_EXTRA_TUNING_OPTION
{ "all", AARCH64_FUSE_ALL },
{ NULL, AARCH64_FUSE_NOTHING }
};
-#undef AARCH64_FUION_PAIR
#define AARCH64_EXTRA_TUNING_OPTION(name, internal_name) \
{ name, AARCH64_EXTRA_TUNE_##internal_name },
{ "all", AARCH64_EXTRA_TUNE_ALL },
{ NULL, AARCH64_EXTRA_TUNE_NONE }
};
-#undef AARCH64_EXTRA_TUNING_OPTION
/* Tuning parameters. */
#define AARCH64_ARCH(NAME, CORE, ARCH_IDENT, ARCH_REV, FLAGS) \
{NAME, CORE, CORE, AARCH64_ARCH_##ARCH_IDENT, ARCH_REV, FLAGS, NULL},
#include "aarch64-arches.def"
-#undef AARCH64_ARCH
{NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL}
};
all_architectures[AARCH64_ARCH_##ARCH].architecture_version, \
FLAGS, &COSTS##_tunings},
#include "aarch64-cores.def"
-#undef AARCH64_CORE
{"generic", generic, cortexa53, AARCH64_ARCH_8A, 8,
AARCH64_FL_FOR_ARCH8, &generic_tunings},
{NULL, aarch64_none, aarch64_none, aarch64_no_arch, 0, 0, NULL}
#define AARCH64_CORE(NAME, INTERNAL_IDENT, SCHED, ARCH, FLAGS, COSTS, IMP, PART) \
TARGET_CPU_##INTERNAL_IDENT,
#include "aarch64-cores.def"
-#undef AARCH64_CORE
TARGET_CPU_generic
};
{
#include "aarch64-option-extensions.def"
};
-#undef AARCH64_OPT_EXTENSION
struct aarch64_core_data
{ NULL, NULL, NULL, NULL, 0 }
};
-#undef AARCH64_CORE
struct aarch64_arch_driver_info
{
{NULL, NULL, 0}
};
-#undef AARCH64_ARCH
/* Return an aarch64_arch_driver_info for the architecture described
by ID, or NULL if ID describes something we don't know about. */
projects / gcc.git / commitdiff