r600g: write proper output prim type

Vadim's code derived it from the info.mode, but it needs
to be takes from the geometry shader output primitive.

Signed-off-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 057852029ff7dfb0fdb5e0cf61e3e811315986c3..2828a75078389ef6a4224e267e0e01264732bbe1 100644 (file)
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -3593,6 +3593,30 @@ void evergreen_update_es_state(struct pipe_context *ctx, struct r600_pipe_shader
        /* After that, the NOP relocation packet must be emitted (shader->bo, RADEON_USAGE_READ). */
 }
 
+static unsigned r600_conv_prim_to_gs_out(unsigned mode)
+{
+       static const int prim_conv[] = {
+               V_028A6C_OUTPRIM_TYPE_POINTLIST,
+               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
+               V_028A6C_OUTPRIM_TYPE_TRISTRIP
+       };
+       assert(mode < Elements(prim_conv));
+
+       return prim_conv[mode];
+}
+
 void evergreen_update_gs_state(struct pipe_context *ctx, struct r600_pipe_shader *shader)
 {
        struct r600_context *rctx = (struct r600_context *)ctx;
@@ -3604,13 +3628,14 @@ void evergreen_update_gs_state(struct pipe_context *ctx, struct r600_pipe_shader
 
        r600_init_command_buffer(cb, 64);
 
-       /* VGT_GS_OUT_PRIM_TYPE is written by r6000_draw_vbo */
        /* VGT_GS_MODE is written by evergreen_emit_shader_stages */
 
        r600_store_context_reg(cb, R_028AB8_VGT_VTX_CNT_EN, 1);
 
        r600_store_context_reg(cb, R_028B38_VGT_GS_MAX_VERT_OUT,
                               S_028B38_MAX_VERT_OUT(rshader->gs_max_out_vertices));
+       r600_store_context_reg(cb, R_028A6C_VGT_GS_OUT_PRIM_TYPE,
+                              r600_conv_prim_to_gs_out(rshader->gs_output_prim));
 
        if (rctx->screen->b.info.drm_minor >= 35) {
                r600_store_context_reg(cb, R_028B90_VGT_GS_INSTANCE_CNT,

diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index 6cc6ef048bae7bb1d8fd532be1fa3f3e262c5e79..96fdd0e00ad16208c3800183ada82f2571be59a1 100644 (file)
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -1285,30 +1285,6 @@ static bool r600_update_derived_state(struct r600_context *rctx)
        return true;
 }
 
-static unsigned r600_conv_prim_to_gs_out(unsigned mode)
-{
-       static const int prim_conv[] = {
-               V_028A6C_OUTPRIM_TYPE_POINTLIST,
-               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
-               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
-               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
-               V_028A6C_OUTPRIM_TYPE_LINESTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP,
-               V_028A6C_OUTPRIM_TYPE_TRISTRIP
-       };
-       assert(mode < Elements(prim_conv));
-
-       return prim_conv[mode];
-}
-
 void r600_emit_clip_misc_state(struct r600_context *rctx, struct r600_atom *atom)
 {
        struct radeon_winsys_cs *cs = rctx->b.rings.gfx.cs;
@@ -1438,8 +1414,6 @@ static void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info
                r600_write_context_reg(cs, R_028A0C_PA_SC_LINE_STIPPLE,
                                       S_028A0C_AUTO_RESET_CNTL(ls_mask) |
                                       (rctx->rasterizer ? rctx->rasterizer->pa_sc_line_stipple : 0));
-               r600_write_context_reg(cs, R_028A6C_VGT_GS_OUT_PRIM_TYPE,
-                                      r600_conv_prim_to_gs_out(info.mode));
                r600_write_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE,
                                      r600_conv_pipe_prim(info.mode));