fold-vec-div-float.c: Update dg-requires and dg-options statements.

2017-05-18  Will Schmidt  <will_schmidt@vnet.ibm.com>

[gcc/testsuite]

	* fold-vec-div-float.c: Update dg-requires and dg-options statements.
	* fold-vec-div-floatdouble.c: Likewise.
	* fold-vec-logical-ands-char.c: Likewise.
	* fold-vec-logical-ands-int.c: Likewise.
	* fold-vec-logical-ands-short.c: Likewise.
	* fold-vec-logical-ors-char.c: Likewise.
	* fold-vec-logical-ors-int.c: Likewise.
	* fold-vec-logical-ors-short.c: Likewise.
	* fold-vec-logical-other-char.c: Likewise.
	* fold-vec-mule-misc.c: Likewise.
	* fold-vec-mult-float.c: Likewise.
	* fold-vec-mult-floatdouble.c: Likewise.
	* fold-vec-mult-int.c: Likewise.
	* fold-vec-mult-int128-p9.c: Likewise.
	* fold-vec-sub-floatdouble.c: Likewise.
	* fold-vec-div-longlong.c: Update dg-requires and dg-options statements.
	Add lp64 requirement.
	* fold-vec-mult-int128-p8.c: Likewise.
	* fold-vec-logical-ors-longlong.c: Fix comment typo.

From-SVN: r248202

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 98c8081547d0756a4d27ca6807c93302381fcd2a..d20ade3afcd9e11b66aae501d9a1997c4b730f4d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,25 @@
+2017-05-18  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+       * fold-vec-div-float.c: Update dg-requires and dg-options statements.
+       * fold-vec-div-floatdouble.c: Likewise.
+       * fold-vec-logical-ands-char.c: Likewise.
+       * fold-vec-logical-ands-int.c: Likewise.
+       * fold-vec-logical-ands-short.c: Likewise.
+       * fold-vec-logical-ors-char.c: Likewise.
+       * fold-vec-logical-ors-int.c: Likewise.
+       * fold-vec-logical-ors-short.c: Likewise.
+       * fold-vec-logical-other-char.c: Likewise.
+       * fold-vec-mule-misc.c: Likewise.
+       * fold-vec-mult-float.c: Likewise.
+       * fold-vec-mult-floatdouble.c: Likewise.
+       * fold-vec-mult-int.c: Likewise.
+       * fold-vec-mult-int128-p9.c: Likewise.
+       * fold-vec-sub-floatdouble.c: Likewise.
+       * fold-vec-div-longlong.c: Update dg-requires and dg-options statements.
+       Add lp64 requirement.
+       * fold-vec-mult-int128-p8.c: Likewise.
+       * fold-vec-logical-ors-longlong.c: Fix comment typo.
+
 2017-05-18  Steven Munroe  <munroesj@gcc.gnu.org>
 
        * gcc.target/powerpc/bmi-andn-1.c: Fix-up dg-options.

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
index 8e8f645baf42f9fb77af7f8be1c18949a94e6cd2..47254ce66a83a873c6749ff4a598debb60fdf420 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-float.c
@@ -1,9 +1,9 @@
 /* Verify that overloaded built-ins for vec_div with float
-   inputs produce the right results with -maltivec.  */
+   inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
index 0559013dc332cafd40859a53fb3c38f42ce0cf59..569467e61f946f70b4dcc2147b701d5b0b70a000 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-floatdouble.c
@@ -1,9 +1,9 @@
 /* Verify that overloaded built-ins for vec_div with float and
-   double inputs for VSX produce the right results with -mvsx. */
+   double inputs for VSX produce the right results. */
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec" } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
index c37c6485817683d450663b4cbfb0ef5a81c26caf..312e984d3cc07e99391a62529fcead1259c8e42f 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-div-longlong.c
@@ -2,8 +2,9 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -mpower8-vector -O3" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-mvsx -O2" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
index 021da58441e1daaca8f2e2eda7f3eee2c4367b1c..d1f66f434add000b655f654988d35c0de7cdeabf 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-char.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
index ccac7d5f8f23f491b33bc9241bb47a3f102f1a24..59a23e89b485f13a59e4a914a9980f48e9556b99 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-int.c
@@ -2,8 +2,8 @@
  * with int inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
index 8ee320675b1538bda7f6e16787aa7a1b93947b9d..805d34561bade6308e1f13fbb11573960af9d553 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ands-short.c
@@ -2,8 +2,8 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
index 283189f8713478a5753050f277a5d1523a1b1d53..7406039d0549ab6f96027fc72a019685ffff45bb 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-char.c
@@ -3,11 +3,10 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 
-
 vector signed char
 test1_or (vector bool char x, vector signed char y)
 {

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
index 11e98ae4dcf91635a11c3c3b467c22dcb364cf8f..a7c6366b938b5dc1d9e000953e9c0b4d784e4eeb 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-int.c
@@ -2,8 +2,8 @@
  * with int inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
index ac532f52d0c3f177a47f85994f7f8b19f5b0c3f1..7ca23fb24543639ad2f6f63eb25a8732b2508a94 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-longlong.c
@@ -153,7 +153,7 @@ test6_nor (vector unsigned long long x, vector unsigned long long y)
 
 // Codegen on power7 is such that the vec_or() tests generate more xxlor
 // instructions than what is seen on power8 or newer.
-// Thus, an additional target close for the xxlor instruction check.
+// Thus, an additional target clause for the xxlor instruction check.
 /* { dg-final { scan-assembler-times {\mxxlor\M} 6 { target p8vector_hw }  } } */
 /* { dg-final { scan-assembler-times {\mxxlor\M} 24 { target { ! p8vector_hw }  }  } } */
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
index 24f3a55efe0146f80ad7873ae59875594b5e6d20..8352a7f4dc59e6ffe7872dd9af45f63eff95b7ac 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-ors-short.c
@@ -2,8 +2,8 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -O1" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O1" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
index 8726df617de4736ecaa3128901302b3e8472fb9f..7fe3e0b8e0e955b3beac5ccabf9a78194bf374ec 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-logical-other-char.c
@@ -3,7 +3,7 @@
  * vec_nand) were added as part of ISA 2.07 (P8).  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target p8vector_hw } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mpower8-vector -O1" } */
 
 #include <altivec.h>

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
index 4bb618531693b2bc532498c1f482d78bad87b761..9b89118a0fa7840facea19b0688d6c97306ee374 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mule-misc.c
@@ -1,8 +1,8 @@
 /* PR target/79941 */
 
 /* { dg-do run } */
-/* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-mvsx -O2 -save-temps" } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-maltivec -O2 -save-temps" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
index 619cd6eaed8b6aaeca7cbdab517044d8ab65fc00..46afc6855700c60daa94c92a14200308f062ea1f 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-float.c
@@ -2,8 +2,8 @@
    inputs produce the right results.  */
 
 /* { dg-do compile } */
-/* { dg-require-effective-target powerpc_altivec_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
index 685318a322b83d7a9821842153f854f798bafa21..59e936154e95687d17b32ed8928398ffc6ff76e3 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-floatdouble.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
index 3359fbec61c78f9da2b39d37da5e5d00fdaf7fd7..b536bcedaa9fd869239be5a08b3231ca8c0b353b 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
-/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-options "-mpower8-vector" } */
 
 #include <altivec.h>
 

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
index a133c5d90fe88c76d388834c95a0ec4c86067bf8..97d6b945f43efc9850b8c0861bd38c738ce93f37 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p8.c
@@ -4,7 +4,8 @@
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-require-effective-target int128 } */
-/* { dg-options "-maltivec -mvsx -mpower8-vector" } */
+/* { dg-require-effective-target lp64 } */
+/* { dg-options "-mpower8-vector" } */
 /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
 
 #include "altivec.h"

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
index 96c9d01968229785ba10d37728ad5699cc32d5ab..e81ea5f3134336eb5b370738108f156da4b17f9f 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-mult-int128-p9.c
@@ -5,7 +5,7 @@
 /* { dg-require-effective-target powerpc_float128_hw_ok } */
 /* { dg-require-effective-target int128 } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
-/* { dg-options "-maltivec -mvsx -mcpu=power9 -O2" } */
+/* { dg-options "-mcpu=power9 -O2" } */
 /* { dg-additional-options "-maix64" { target powerpc-ibm-aix* } } */
 
 #include "altivec.h"

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
index c29acc93b5644d754a18660473d288da5e3f4604..116f15e66887745814df1e6a9451994890fe919a 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-sub-floatdouble.c
@@ -3,7 +3,7 @@
 
 /* { dg-do compile } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
-/* { dg-options "-maltivec -mvsx" } */
+/* { dg-options "-mvsx" } */
 
 #include <altivec.h>