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@@ -13,9 +13,9 @@ construction of FSMs and arbitrary length pipelines.
 | Git Repo | Documentation | Description   | Pypi    |
 |----------|---------------|---------------|--------
 | [SOC](https://git.libre-soc.org/?p=soc.git;a=tree) | [Libre-SOC](https://docs.libre-soc.org/soc/) | Main OpenPOWER Hybrid CPU-GPU | |
-| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | -- | Equivalent to hardfloat-3 | https://pypi.org/project/libresoc-ieee754fpu |
-| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | -- | Equivalent to Chisel3.util | https://pypi.org/project/libresoc-nmutil |
-| [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure |  https://pypi.org/project/libresoc-openpower-isa/  |
+| [FPU](https://git.libre-soc.org/?p=ieee754fpu.git;a=tree) | -- | Equivalent to hardfloat-3 | [libresoc-ieee754fpu](https://pypi.org/project/libresoc-ieee754fpu) |
+| [nmutil](https://git.libre-soc.org/?p=nmutil.git;a=tree) | -- | Equivalent to Chisel3.util | [libresoc-nmutil](https://pypi.org/project/libresoc-nmutil) |
+| [OpenPOWER ISA](https://git.libre-soc.org/?p=nmutil.git;a=tree) | [OpenPOWER ISA](https://docs.libre-soc.org/openpower-isa/) | Simulator, ISA spec compiler, co-simulation infrastructure |  [libresoc-openpower-isa](https://pypi.org/project/libresoc-openpower-isa/)  |
 
 
 Also see [[SOC Architecture|3d_gpu/architecture]]