+2002-02-13 Ulrich Weigand <uweigand@de.ibm.com>
+
+ * config/s390/s390.c (s390_final_chunkify): Re-run shorten_branches
+ after emitting ltorg insns.
+
+ * config/s390/s390.md (*cmpdf_ccs_0, *cmpdf_ccs, *cmpsf_ccs_0,
+ *cmpsf_ccs, truncdfsf2_ieee, *adddf3, *addsf3, *subdf3, *subsf3,
+ *muldf3, *mulsf3, *divdf3, *divsf3, *negdf2, *negsf2, *absdf2,
+ *abssf2): Fix "op_type" attribute.
+
2002-02-13 Douglas B Rupp <rupp@gnat.com>
* mkconfig.sh: Avoid using a subshell redirect.
}
}
ltorg_uids[max_ltorg] = 0;
- for (insn=get_insns (),uids=0; insn;insn = next_real_insn (insn))
+
+ if (max_ltorg > 0)
+ {
+ for (insn = get_insns (), uids = 0; insn; insn = next_real_insn (insn))
+ if (INSN_UID (insn) == ltorg_uids[uids])
+ {
+ INSN_ADDRESSES_NEW (emit_insn_after (gen_ltorg (
+ gen_rtx_CONST_INT (Pmode, ltorg_uids[++uids])),
+ insn), -1);
+ }
+
+ init_insn_lengths ();
+ shorten_branches (get_insns ());
+ }
+
+ for (insn = get_insns (); insn; insn = next_real_insn (insn))
{
if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
continue;
- if (INSN_UID (insn) == ltorg_uids[uids])
- {
- INSN_ADDRESSES_NEW (emit_insn_after (gen_ltorg (
- gen_rtx_CONST_INT (Pmode, ltorg_uids[++uids])),
- insn), -1);
- }
if (GET_CODE (insn) == JUMP_INSN)
- {
- insn = check_and_change_labels (insn, ltorg_uids);
- }
+ insn = check_and_change_labels (insn, ltorg_uids);
}
+
if (chunkify)
{
for (insn=get_insns (); insn;insn = next_insn (insn))
(match_operand:DF 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"ltdbr\\t%0,%0"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "*cmpdf_ccs_0_ibm"
[(set (reg 33)
"@
cdbr\\t%0,%1
cdb\\t%0,%1"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "atype" "reg,mem")])
(define_insn "*cmpdf_ccs_ibm"
(match_operand:SF 1 "const0_operand" "")))]
"s390_match_ccmode(insn, CCSmode) && TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"ltebr\\t%0,%0"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "*cmpsf_ccs_0_ibm"
[(set (reg 33)
"@
cebr\\t%0,%1
ceb\\t%0,%1"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "atype" "reg,mem")])
(define_insn "*cmpsf_ccs"
(float_truncate:SF (match_operand:DF 1 "general_operand" "f")))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"ledbr\\t%0,%1"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "truncdfsf2_ibm"
[(set (match_operand:SF 0 "register_operand" "=f,f")
"@
adbr\\t%0,%2
adb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "atype" "reg,mem")])
(define_insn "*adddf3_ibm"
"@
aebr\\t%0,%2
aeb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "atype" "reg,mem")])
(define_insn "*addsf3"
"@
sdbr\\t%0,%2
sdb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "atype" "reg,mem")])
(define_insn "*subdf3_ibm"
"@
sebr\\t%0,%2
seb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "atype" "reg,mem")])
(define_insn "*subsf3_ibm"
"@
mdbr\\t%0,%2
mdb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fmul")
(set_attr "atype" "reg,mem")])
"@
meebr\\t%0,%2
meeb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fmul")
(set_attr "atype" "reg,mem")])
"@
ddbr\\t%0,%2
ddb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fdiv")
(set_attr "atype" "reg,mem")])
"@
debr\\t%0,%2
deb\\t%0,%2"
- [(set_attr "op_type" "RR,RX")
+ [(set_attr "op_type" "RRE,RXE")
(set_attr "type" "fdiv")
(set_attr "atype" "reg,mem")])
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"lcdbr\\t%0,%1"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "*negdf2_ibm"
[(set (match_operand:DF 0 "register_operand" "=f")
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"lcebr\\t%0,%1"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "*negsf2"
[(set (match_operand:SF 0 "register_operand" "=f")
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"lpdbr\\t%0,%1"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "*absdf2_ibm"
[(set (match_operand:DF 0 "register_operand" "=f")
(clobber (reg:CC 33))]
"TARGET_HARD_FLOAT && TARGET_IEEE_FLOAT"
"lpebr\\t%0,%1"
- [(set_attr "op_type" "RR")])
+ [(set_attr "op_type" "RRE")])
(define_insn "*abssf2_ibm"
[(set (match_operand:SF 0 "register_operand" "=f")