correct errors for sphinx doc build
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 24 Apr 2021 15:04:58 +0000 (16:04 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sat, 24 Apr 2021 15:04:58 +0000 (16:04 +0100)
index.rst [new file with mode: 0644]
src/openpower/decoder/formal/proof_decoder.py
src/openpower/decoder/formal/proof_decoder2.py
src/openpower/decoder/test/test_decoder_gas.py

diff --git a/index.rst b/index.rst
new file mode 100644 (file)
index 0000000..efe78bf
--- /dev/null
+++ b/index.rst
@@ -0,0 +1,23 @@
+Welcome to Libre-SOC's documentation!
+=====================================
+
+.. automodule:: openpower.simulator.test_sim.DecoderTestCases
+    :members:
+
+.. toctree:: gen/modules
+   :maxdepth: 4
+   :caption: OpenPOWER ISA Contents:
+
+.. toctree:: 
+   :maxdepth: 4
+   :caption: OpenPOWER ISA Contents:
+   :glob: 
+
+
+
+Indices and tables
+==================
+
+* :ref:`genindex`
+* :ref:`modindex`
+* :ref:`search`
index ce19a4265d6422b9fe5f09bafaa6bfde294422e6..ae53efb5a54874799bacd147f462fef06b8e3573 100644 (file)
@@ -6,7 +6,7 @@ from openpower.decoder.power_decoder import create_pdecode, PowerOp
 from openpower.decoder.power_enums import (In1Sel, In2Sel, In3Sel,
                                      OutSel, RC, Form, Function,
                                      LdstLen, CryIn,
-                                     MicrOp, SPR, get_csv)
+                                     MicrOp, get_csv)
 from openpower.decoder.power_decoder2 import (PowerDecode2,
                                         Decode2ToExecute1Type)
 import unittest
index d20c28f1c3225fdebbd23eb2f5317ea6120995e8..ba7a175e67bb8a609109e27f37362d08501277e7 100644 (file)
@@ -5,7 +5,7 @@ from nmutil.formaltest import FHDLTestCase
 from openpower.decoder.power_decoder import create_pdecode, PowerOp
 from openpower.decoder.power_enums import (In1Sel, In2Sel, In3Sel,
                                      OutSel, RC, Form,
-                                     MicrOp, SPR)
+                                     MicrOp, SPRfull as SPR)
 from openpower.decoder.power_decoder2 import (PowerDecode2,
                                         Decode2ToExecute1Type)
 import unittest
index fdbf8a31b04b0cc5205a3f79ada188be528d1fbd..a8951fa2f5ff7f4f1c2027c8d5bced99b0fb5b06 100644 (file)
@@ -10,7 +10,7 @@ from openpower.decoder.power_decoder import (create_pdecode)
 from openpower.decoder.power_enums import (Function, MicrOp,
                                      In1Sel, In2Sel, In3Sel,
                                      OutSel, RC, LdstLen, CryIn,
-                                     single_bit_flags, Form, SPR,
+                                     single_bit_flags, Form, SPRfull as SPR,
                                      get_signal_name, get_csv)
 from openpower.decoder.power_decoder2 import (PowerDecode2)
 from openpower.simulator.gas import get_assembled_instruction