i965: Remove the context parameter from brw_texture_offset

It wasn't really being used anyway.  We used it to assert that gpu_shader5
is supported in the back-end but that should be caught by the front-end.

Signed-off-by: Jason Ekstrand <jason.ekstrand@intel.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>

diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
index e1687edb2b1d895e61331d23b17db00bc5102474..f2f78be5e899d9983bc825d13040da5d0fc1aaa9 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
@@ -1707,7 +1707,7 @@ fs_visitor::nir_emit_texture(nir_tex_instr *instr)
    for (unsigned i = 0; i < 3; i++) {
       if (instr->const_offset[i] != 0) {
          assert(offset_components == 0);
-         tex_offset = fs_reg(brw_texture_offset(ctx, instr->const_offset, 3));
+         tex_offset = fs_reg(brw_texture_offset(instr->const_offset, 3));
          break;
       }
    }

diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index c66ec3ee3b045d920d8a21e77adbd03785a38596..2b8dfe4476679d9dcdd92071a0b2df661b83330f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -2351,7 +2351,7 @@ fs_visitor::visit(ir_texture *ir)
           * offset, and a non-constant offset.
           */
          offset_value =
-            fs_reg(brw_texture_offset(ctx, const_offset->value.i,
+            fs_reg(brw_texture_offset(const_offset->value.i,
                                       const_offset->type->vector_elements));
       } else {
          ir->offset->accept(this);

diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp
index d0d5cf9c4dd7b396397e07f2fab12267cc5723af..91ffb532d09af33954ac9de67c34a82a8094bb0a 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.cpp
+++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
@@ -393,14 +393,8 @@ brw_math_function(enum opcode op)
 }
 
 uint32_t
-brw_texture_offset(struct gl_context *ctx, int *offsets,
-                   unsigned num_components)
+brw_texture_offset(int *offsets, unsigned num_components)
 {
-   /* If the driver does not support GL_ARB_gpu_shader5, the offset
-    * must be constant.
-    */
-   assert(offsets != NULL || ctx->Extensions.ARB_gpu_shader5);
-
    if (!offsets) return 0;  /* nonconstant offset; caller will handle it. */
 
    /* Combine all three offsets into a single unsigned dword:

diff --git a/src/mesa/drivers/dri/i965/brw_shader.h b/src/mesa/drivers/dri/i965/brw_shader.h
index 8a3263e573d2a2559a18e75c73248b7baf246800..e6246ed7fc3f18dacef13e05cfb9c03be9c93c6d 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_shader.h
+++ b/src/mesa/drivers/dri/i965/brw_shader.h
@@ -206,8 +206,7 @@ public:
    virtual void invalidate_live_intervals() = 0;
 };
 
-uint32_t brw_texture_offset(struct gl_context *ctx, int *offsets,
-                            unsigned num_components);
+uint32_t brw_texture_offset(int *offsets, unsigned num_components);
 
 #endif /* __cplusplus */
 

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index 3d16caa74f0410c1165fe69a8b8ad5440d904d66..20e61099e618d381d7c696cbe2eadc7460f356e8 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -2630,7 +2630,7 @@ vec4_visitor::visit(ir_texture *ir)
 
    if (ir->offset != NULL && !has_nonconstant_offset) {
       inst->offset =
-         brw_texture_offset(ctx, ir->offset->as_constant()->value.i,
+         brw_texture_offset(ir->offset->as_constant()->value.i,
                             ir->offset->type->vector_elements);
    }