Disable memory_dff for initialized FFs
authorClifford Wolf <clifford@clifford.at>
Mon, 28 May 2018 15:16:15 +0000 (17:16 +0200)
committerClifford Wolf <clifford@clifford.at>
Mon, 28 May 2018 15:16:15 +0000 (17:16 +0200)
Signed-off-by: Clifford Wolf <clifford@clifford.at>
passes/memory/memory_dff.cc

index 40691d160c67d8cadf17d12415e1ad0200144f5a..6e036397ddf5e25995b19b56271383081bdffab8 100644 (file)
@@ -33,8 +33,20 @@ struct MemoryDffWorker
        dict<SigBit, int> sigbit_users_count;
        dict<SigSpec, Cell*> mux_cells_a, mux_cells_b;
        pool<Cell*> forward_merged_dffs, candidate_dffs;
+       pool<SigBit> init_bits;
 
-       MemoryDffWorker(Module *module) : module(module), sigmap(module) { }
+       MemoryDffWorker(Module *module) : module(module), sigmap(module)
+       {
+               for (auto wire : module->wires()) {
+                       if (wire->attributes.count("\\init") == 0)
+                               continue;
+                       SigSpec sig = sigmap(wire);
+                       Const initval = wire->attributes.count("\\init");
+                       for (int i = 0; i < GetSize(sig) && i < GetSize(initval); i++)
+                               if (initval[i] == State::S0 || initval[i] == State::S1)
+                                       init_bits.insert(sig[i]);
+               }
+       }
 
        bool find_sig_before_dff(RTLIL::SigSpec &sig, RTLIL::SigSpec &clk, bool &clk_polarity, bool after = false)
        {
@@ -45,6 +57,9 @@ struct MemoryDffWorker
                        if (bit.wire == NULL)
                                continue;
 
+                       if (!after && init_bits.count(sigmap(bit)))
+                               return false;
+
                        for (auto cell : dff_cells)
                        {
                                if (after && forward_merged_dffs.count(cell))
@@ -72,6 +87,9 @@ struct MemoryDffWorker
                                if (d.size() != 1)
                                        continue;
 
+                               if (after && init_bits.count(d))
+                                       return false;
+
                                bit = d;
                                clk = this_clk;
                                clk_polarity = this_clk_polarity;