Add assert

diff --git a/src/openpower/decoder/isa/test_caller_svp64_matrix.py b/src/openpower/decoder/isa/test_caller_svp64_matrix.py
index f7d55cc33c28b5a2b0ba74c7d5e42b7792ecfed9..bd4c6b34be6313246a5fd153914676f9b8691e71 100644 (file)
--- a/src/openpower/decoder/isa/test_caller_svp64_matrix.py
+++ b/src/openpower/decoder/isa/test_caller_svp64_matrix.py
@@ -94,9 +94,7 @@ class DecoderTestCase(FHDLTestCase):
             for i in range(4):
                 print("maddld-matrix i", i, results[i])
             # confirm that the results are as expected
-            # for i, (t, u) in enumerate(res):
-            #    self.assertEqual(sim.fpr(i+2), t)
-            #    self.assertEqual(sim.fpr(i+6), u)
+            self.assertEqual(results, expected)
 
     def test_sv_remap1(self):
         """>>> lst = ["svshape 2, 2, 3, 0, 0",