syntax error in pll.v

diff --git a/libresoc/pll.v b/libresoc/pll.v
index 9dc8428bf441f0d2b72b858c1c14fe49d948215e..19e8b60641c1ec4318ae2ba09d9bfb47d3e83b38 100644 (file)
--- a/libresoc/pll.v
+++ b/libresoc/pll.v
@@ -5,6 +5,6 @@ module pll(input [0:0] ref_v,
            output [0:0] vco_test_ana, 
            output [0:0] out_v);
   /* fake PLL */
-  assign out_v = ref;
+  assign out_v = ref_v;
 endmodule