goto secure_compile_exit;
while (true) {
- read(fd_secure_input[0], &sc_type, sizeof(sc_type));
+ radv_sc_read(fd_secure_input[0], &sc_type, sizeof(sc_type), false);
if (sc_type == RADV_SC_TYPE_COMPILE_PIPELINE) {
struct radv_pipeline *pipeline;
+ bool sc_read = true;
pipeline = vk_zalloc2(&device->alloc, NULL, sizeof(*pipeline), 8,
VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
/* Read pipeline layout */
struct radv_pipeline_layout layout;
- read(fd_secure_input[0], &layout, sizeof(struct radv_pipeline_layout));
- read(fd_secure_input[0], &layout.num_sets, sizeof(uint32_t));
+ sc_read = radv_sc_read(fd_secure_input[0], &layout, sizeof(struct radv_pipeline_layout), true);
+ sc_read &= radv_sc_read(fd_secure_input[0], &layout.num_sets, sizeof(uint32_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
for (uint32_t set = 0; set < layout.num_sets; set++) {
uint32_t layout_size;
- read(fd_secure_input[0], &layout_size, sizeof(uint32_t));
+ sc_read &= radv_sc_read(fd_secure_input[0], &layout_size, sizeof(uint32_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
layout.set[set].layout = malloc(layout_size);
layout.set[set].layout->layout_size = layout_size;
- read(fd_secure_input[0], layout.set[set].layout, layout.set[set].layout->layout_size);
+ sc_read &= radv_sc_read(fd_secure_input[0], layout.set[set].layout,
+ layout.set[set].layout->layout_size, true);
}
pipeline->layout = &layout;
/* Read pipeline key */
struct radv_pipeline_key key;
- read(fd_secure_input[0], &key, sizeof(struct radv_pipeline_key));
+ sc_read &= radv_sc_read(fd_secure_input[0], &key, sizeof(struct radv_pipeline_key), true);
/* Read pipeline create flags */
VkPipelineCreateFlags flags;
- read(fd_secure_input[0], &flags, sizeof(VkPipelineCreateFlags));
+ sc_read &= radv_sc_read(fd_secure_input[0], &flags, sizeof(VkPipelineCreateFlags), true);
/* Read stage and shader information */
uint32_t num_stages;
const VkPipelineShaderStageCreateInfo *pStages[MESA_SHADER_STAGES] = { 0, };
- read(fd_secure_input[0], &num_stages, sizeof(uint32_t));
+ sc_read &= radv_sc_read(fd_secure_input[0], &num_stages, sizeof(uint32_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
for (uint32_t i = 0; i < num_stages; i++) {
/* Read stage */
gl_shader_stage stage;
- read(fd_secure_input[0], &stage, sizeof(gl_shader_stage));
+ sc_read &= radv_sc_read(fd_secure_input[0], &stage, sizeof(gl_shader_stage), true);
VkPipelineShaderStageCreateInfo *pStage = calloc(1, sizeof(VkPipelineShaderStageCreateInfo));
/* Read entry point name */
size_t name_size;
- read(fd_secure_input[0], &name_size, sizeof(size_t));
+ sc_read &= radv_sc_read(fd_secure_input[0], &name_size, sizeof(size_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
char *ep_name = malloc(name_size);
- read(fd_secure_input[0], ep_name, name_size);
+ sc_read &= radv_sc_read(fd_secure_input[0], ep_name, name_size, true);
pStage->pName = ep_name;
/* Read shader module */
size_t module_size;
- read(fd_secure_input[0], &module_size, sizeof(size_t));
+ sc_read &= radv_sc_read(fd_secure_input[0], &module_size, sizeof(size_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
struct radv_shader_module *module = malloc(module_size);
- read(fd_secure_input[0], module, module_size);
+ sc_read &= radv_sc_read(fd_secure_input[0], module, module_size, true);
pStage->module = radv_shader_module_to_handle(module);
/* Read specialization info */
bool has_spec_info;
- read(fd_secure_input[0], &has_spec_info, sizeof(bool));
+ sc_read &= radv_sc_read(fd_secure_input[0], &has_spec_info, sizeof(bool), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
if (has_spec_info) {
VkSpecializationInfo *specInfo = malloc(sizeof(VkSpecializationInfo));
pStage->pSpecializationInfo = specInfo;
- read(fd_secure_input[0], &specInfo->dataSize, sizeof(size_t));
+ sc_read &= radv_sc_read(fd_secure_input[0], &specInfo->dataSize, sizeof(size_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
void *si_data = malloc(specInfo->dataSize);
- read(fd_secure_input[0], si_data, specInfo->dataSize);
+ sc_read &= radv_sc_read(fd_secure_input[0], si_data, specInfo->dataSize, true);
specInfo->pData = si_data;
- read(fd_secure_input[0], &specInfo->mapEntryCount, sizeof(uint32_t));
+ sc_read &= radv_sc_read(fd_secure_input[0], &specInfo->mapEntryCount, sizeof(uint32_t), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+
VkSpecializationMapEntry *mapEntries = malloc(sizeof(VkSpecializationMapEntry) * specInfo->mapEntryCount);
- for (uint32_t j = 0; j < specInfo->mapEntryCount; j++)
- read(fd_secure_input[0], &mapEntries[j], sizeof(VkSpecializationMapEntry));
+ for (uint32_t j = 0; j < specInfo->mapEntryCount; j++) {
+ sc_read &= radv_sc_read(fd_secure_input[0], &mapEntries[j], sizeof(VkSpecializationMapEntry), true);
+ if (!sc_read)
+ goto secure_compile_exit;
+ }
specInfo->pMapEntries = mapEntries;
}
/* Read the init result returned from the secure process */
enum radv_secure_compile_type sc_type;
- read(fd_secure_output[process][0], &sc_type, sizeof(sc_type));
+ bool sc_read = radv_sc_read(fd_secure_output[process][0], &sc_type, sizeof(sc_type), true);
- if (sc_type == RADV_SC_TYPE_INIT_FAILURE) {
+ if (sc_type == RADV_SC_TYPE_INIT_FAILURE || !sc_read) {
close(fd_secure_input[process][0]);
close(fd_secure_input[process][1]);
close(fd_secure_output[process][1]);
return NULL;
}
-static void
+static VkResult
radv_secure_compile(struct radv_pipeline *pipeline,
struct radv_device *device,
const struct radv_pipeline_key *key,
/* Read the data returned from the secure process */
while (sc_type != RADV_SC_TYPE_COMPILE_PIPELINE_FINISHED) {
- read(fd_secure_output, &sc_type, sizeof(sc_type));
+ if (!radv_sc_read(fd_secure_output, &sc_type, sizeof(sc_type), true))
+ return VK_ERROR_DEVICE_LOST;
if (sc_type == RADV_SC_TYPE_WRITE_DISK_CACHE) {
assert(device->physical_device->disk_cache);
uint8_t disk_sha1[20];
- read(fd_secure_output, disk_sha1, sizeof(uint8_t) * 20);
+ if (!radv_sc_read(fd_secure_output, disk_sha1, sizeof(uint8_t) * 20, true))
+ return VK_ERROR_DEVICE_LOST;
uint32_t entry_size;
- read(fd_secure_output, &entry_size, sizeof(uint32_t));
+ if (!radv_sc_read(fd_secure_output, &entry_size, sizeof(uint32_t), true))
+ return VK_ERROR_DEVICE_LOST;
struct cache_entry *entry = malloc(entry_size);
- read(fd_secure_output, entry, entry_size);
+ if (!radv_sc_read(fd_secure_output, entry, entry_size, true))
+ return VK_ERROR_DEVICE_LOST;
disk_cache_put(device->physical_device->disk_cache,
disk_sha1, entry, entry_size,
free(entry);
} else if (sc_type == RADV_SC_TYPE_READ_DISK_CACHE) {
uint8_t disk_sha1[20];
- read(fd_secure_output, disk_sha1, sizeof(uint8_t) * 20);
+ if (!radv_sc_read(fd_secure_output, disk_sha1, sizeof(uint8_t) * 20, true))
+ return VK_ERROR_DEVICE_LOST;
size_t size;
struct cache_entry *entry = (struct cache_entry *)
device->sc_state->secure_compile_thread_counter--;
device->sc_state->secure_compile_processes[process].in_use = false;
mtx_unlock(&device->sc_state->secure_compile_mutex);
+
+ return VK_SUCCESS;
}
static VkResult
struct radv_pipeline_key key = radv_generate_graphics_pipeline_key(pipeline, pCreateInfo, &blend, has_view_index);
if (radv_device_use_secure_compile(device->instance)) {
- radv_secure_compile(pipeline, device, &key, pStages, pCreateInfo->flags, pCreateInfo->stageCount);
- /* TODO: should we actualy return failure ??? */
- return VK_SUCCESS;
+ return radv_secure_compile(pipeline, device, &key, pStages, pCreateInfo->flags, pCreateInfo->stageCount);
} else {
radv_create_shaders(pipeline, device, cache, &key, pStages, pCreateInfo->flags, pipeline_feedback, stage_feedbacks);
}
pStages[MESA_SHADER_COMPUTE] = &pCreateInfo->stage;
if (radv_device_use_secure_compile(device->instance)) {
- radv_secure_compile(pipeline, device, &(struct radv_pipeline_key) {0}, pStages, pCreateInfo->flags, 1);
+ result = radv_secure_compile(pipeline, device, &(struct radv_pipeline_key) {0}, pStages, pCreateInfo->flags, 1);
*pPipeline = radv_pipeline_to_handle(pipeline);
- /* TODO: should we actualy return failure ??? */
- return VK_SUCCESS;
+
+ return result;
} else {
radv_create_shaders(pipeline, device, cache, &(struct radv_pipeline_key) {0}, pStages, pCreateInfo->flags, pipeline_feedback, stage_feedbacks);
}