/* Definitions of target machine for GNU compiler,
for IBM RS/6000 POWER running AIX version 3.x with the fixed assembler.
- Copyright (C) 1995 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by Jason Merrill (jason@cygnus.com).
This file is part of GNU CC.
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
+%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
-%{mcpu=620: -mppc}"
+%{mcpu=620: -mppc} \
+%{mcpu=821: -mppc} \
+%{mcpu=860: -mppc}"
/* Define the options for the binder: Start text at 512, align all segments
to 512 bytes, and warn if there is text relocation.
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 POWER running AIX version 4.1.
- Copyright (C) 1994, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@npac.syr.edu).
This file is part of GNU CC.
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
+%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
-%{mcpu=620: -mppc}"
+%{mcpu=620: -mppc} \
+%{mcpu=821: -mppc} \
+%{mcpu=860: -mppc}"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=620: -D_ARCH_PPC} \
+%{mcpu=821: -D_ARCH_PPC} \
+%{mcpu=860: -D_ARCH_PPC}"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT MASK_NEW_MNEMONICS
+# crti.s for eabi
+
+# Copyright (C) 1996 Free Software Foundation, Inc.
+# Written By Michael Meissner
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 2, or (at your option) any
+# later version.
+#
+# In addition to the permissions in the GNU General Public License, the
+# Free Software Foundation gives you unlimited permission to link the
+# compiled version of this file with other programs, and to distribute
+# those programs without any restriction coming from the use of this
+# file. (The General Public License restrictions do apply in other
+# respects; for example, they cover modification of the file, and
+# distribution when not linked into another program.)
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING. If not, write to
+# the Free Software Foundation, 59 Temple Place - Suite 330,
+# Boston, MA 02111-1307, USA.
+#
+# As a special exception, if you link this library with files
+# compiled with GCC to produce an executable, this does not cause
+# the resulting executable to be covered by the GNU General Public License.
+# This exception does not however invalidate any other reasons why
+# the executable file might be covered by the GNU General Public License.
+#
+
+# This file just supplies labeled starting points for the .got* and other
+# special sections. It is linked in first before other modules.
+
+ .file "crti.s"
+ .ident "GNU C crti.s"
+
+ .section ".got","w"
+ .globl __GOT_START__
+ .type __GOT_START__,@object
+ .weak _GLOBAL_OFFSET_TABLE_
+ .type _GLOBAL_OFFSET_TABLE_,@object
+ .weak _SDA_BASE_
+ .type _SDA_BASE_,@object
+__GOT_START__:
+_GLOBAL_OFFSET_TABLE_:
+_SDA_BASE_:
+
+ .section ".got1","w"
+ .globl __GOT1_START__
+ .type __GOT1_START__,@object
+__GOT1_START__:
+
+ .section ".got2","w"
+ .globl __GOT2_START__
+ .type __GOT2_START__,@object
+__GOT2_START__:
+
+ .section ".fixup","w"
+ .globl __FIXUP_START__
+ .type __FIXUP_START__,@object
+__FIXUP_START__:
+
+ .section ".ctors","w"
+ .globl __CTOR_LIST__
+ .type __CTOR_LIST__,@object
+__CTOR_LIST__:
+
+ .section ".dtors","w"
+ .globl __CTOR_LIST__
+ .type __CTOR_LIST__,@object
+__DTOR_LIST__:
+# crtn.s for eabi
+
+# Copyright (C) 1996 Free Software Foundation, Inc.
+# Written By Michael Meissner
+#
+# This file is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License as published by the
+# Free Software Foundation; either version 2, or (at your option) any
+# later version.
+#
+# In addition to the permissions in the GNU General Public License, the
+# Free Software Foundation gives you unlimited permission to link the
+# compiled version of this file with other programs, and to distribute
+# those programs without any restriction coming from the use of this
+# file. (The General Public License restrictions do apply in other
+# respects; for example, they cover modification of the file, and
+# distribution when not linked into another program.)
+#
+# This file is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+# General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; see the file COPYING. If not, write to
+# the Free Software Foundation, 59 Temple Place - Suite 330,
+# Boston, MA 02111-1307, USA.
+#
+# As a special exception, if you link this library with files
+# compiled with GCC to produce an executable, this does not cause
+# the resulting executable to be covered by the GNU General Public License.
+# This exception does not however invalidate any other reasons why
+# the executable file might be covered by the GNU General Public License.
+#
+
+# This file just supplies labeled ending points for the .got* and other
+# special sections. It is linked in last after other modules.
+
+ .file "crtn.s"
+ .ident "GNU C crtn.s"
+
+ .section ".got","w"
+ .globl __GOT_END__
+ .type __GOT_END__,@object
+__GOT_END__:
+
+ .section ".got1","w"
+ .globl __GOT1_END__
+ .type __GOT1_END__,@object
+__GOT1_END__:
+
+ .section ".got2","w"
+ .globl __GOT2_END__
+ .type __GOT2_END__,@object
+__GOT2_END__:
+
+ .section ".fixup","w"
+ .globl __FIXUP_END__
+ .type __FIXUP_END__,@object
+__FIXUP_END__:
+
+ .section ".ctors","w"
+ .globl __CTOR_END__
+ .type __CTOR_END__,@object
+__CTOR_END__:
+
+ .section ".dtors","w"
+ .globl __CTOR_END__
+ .type __CTOR_END__,@object
+__DTOR_END__:
/* Core target definitions for GNU compiler
for IBM RS/6000 PowerPC targeted to embedded ELF systems.
- Copyright (C) 1995 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
/* Use the simulator crt0 or mvme and libgloss/newlib libraries if desired */
#undef STARTFILE_SPEC
-#define STARTFILE_SPEC "\
+#define STARTFILE_SPEC "crti.o \
%{mmvme: mvme-crt0.o%s} \
%{msim: sim-crt0.o%s}"
#define LIBGCC_SPEC "libgcc.a%s"
#undef ENDFILE_SPEC
-#define ENDFILE_SPEC ""
+#define ENDFILE_SPEC "crtn.o"
/* Embedded ELF system support, using old AIX based calling sequence.
- Copyright (C) 1995 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=620: -D_ARCH_PPC} \
+%{mcpu=821: -D_ARCH_PPC} \
+%{mcpu=860: -D_ARCH_PPC}"
/* Define this macro as a C expression for the initializer of an
array of string to tell the driver program which options are
/* Core target definitions for GNU compiler for PowerPC targeted to
little endian embedded ELF systems.
- Copyright (C) 1995 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=620: -D_ARCH_PPC} \
+%{mcpu=821: -D_ARCH_PPC} \
+%{mcpu=860: -D_ARCH_PPC}"
/* Define this macro as a C expression for the initializer of an
array of string to tell the driver program which options are
/* Support for GCC on simulated PowerPC systems targeted to embedded ELF
systems.
- Copyright (C) 1995 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
/* Use the simulator crt0 or mvme and libgloss/newlib libraries if desired */
#undef STARTFILE_SPEC
-#define STARTFILE_SPEC "\
+#define STARTFILE_SPEC "crti.o \
%{mmvme: mvme-crt0.o%s} \
%{!mmvme: sim-crt0.o%s}"
#define LIBGCC_SPEC "libgcc.a%s"
#undef ENDFILE_SPEC
-#define ENDFILE_SPEC ""
+#define ENDFILE_SPEC "crtn.o"
/* Definitions for Rs6000 running LynxOS.
- Copyright (C) 1995 Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by David Henkel-Wallace, Cygnus Support (gumby@cygnus.com)
This file is part of GNU CC.
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
+%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
-%{mcpu=620: -mppc}"
+%{mcpu=620: -mppc} \
+%{mcpu=821: -mppc} \
+%{mcpu=860: -mppc}"
#undef SUBTARGET_SWITCHES
#define SUBTARGET_SWITCHES \
/* Core target definitions for GNU compiler
for IBM RS/6000 PowerPC running NetWare
- Copyright (C) 1994 Free Software Foundation, Inc.
+ Copyright (C) 1994, 1995, 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
+%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
%{mcpu=620: -mppc} \
+%{mcpu=821: -mppc} \
+%{mcpu=860: -mppc} \
%{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*}"
/* This is the end of what might become sysv4.h. */
/* Definitions of target machine for GNU compiler,
for IBM RS/6000 PowerPC running AIX version 3.2.
- Copyright (C) 1993, 1994, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Contributed by David Edelsohn (edelsohn@npac.syr.edu).
This file is part of GNU CC.
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
+%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
-%{mcpu=620: -mppc}"
+%{mcpu=620: -mppc} \
+%{mcpu=821: -mppc} \
+%{mcpu=860: -mppc}"
#undef CPP_PREDEFINES
#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=620: -D_ARCH_PPC} \
+%{mcpu=821: -D_ARCH_PPC} \
+%{mcpu=860: -D_ARCH_PPC}"
#undef TARGET_DEFAULT
#define TARGET_DEFAULT (MASK_POWERPC | MASK_NEW_MNEMONICS)
/* Subroutines used for code generation on IBM RS/6000.
- Copyright (C) 1991, 1993, 1994, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1991, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
int target_enable; /* Target flags to enable. */
int target_disable; /* Target flags to disable. */
} processor_target_table[]
- = {{"common", PROCESSOR_COMMON, 0, POWER_MASKS | POWERPC_MASKS},
+ = {{"common", PROCESSOR_COMMON, MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_MASKS},
{"power", PROCESSOR_POWER,
MASK_POWER | MASK_MULTIPLE | MASK_STRING,
MASK_POWER2 | POWERPC_MASKS | MASK_NEW_MNEMONICS},
{"403", PROCESSOR_PPC403,
MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+ {"505", PROCESSOR_MPCCORE,
+ MASK_POWERPC | MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
{"601", PROCESSOR_PPC601,
MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS | MASK_MULTIPLE | MASK_STRING,
MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
{"602", PROCESSOR_PPC602,
- MASK_POWER | MASK_POWERPC | MASK_NEW_MNEMONICS,
- MASK_POWER2 | POWERPC_OPT_MASKS | MASK_POWERPC64},
+ MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
+ POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
{"603", PROCESSOR_PPC603,
MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
{"620", PROCESSOR_PPC620,
MASK_POWERPC | MASK_PPC_GFXOPT | MASK_NEW_MNEMONICS,
- POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64}};
+ POWER_MASKS | MASK_PPC_GPOPT | MASK_POWERPC64},
+ {"821", PROCESSOR_MPCCORE,
+ MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64},
+ {"860", PROCESSOR_MPCCORE,
+ MASK_POWERPC | MASK_SOFT_FLOAT | MASK_NEW_MNEMONICS,
+ POWER_MASKS | POWERPC_OPT_MASKS | MASK_POWERPC64}};
int ptt_size = sizeof (processor_target_table) / sizeof (struct ptt);
/* Identify the processor type */
rs6000_select[0].string = default_cpu;
rs6000_cpu = PROCESSOR_DEFAULT;
- if (rs6000_cpu == PROCESSOR_PPC403)
- target_flags |= MASK_SOFT_FLOAT;
for (i = 0; i < sizeof (rs6000_select) / sizeof (rs6000_select[0]); i++)
{
}
}
- if (!WORDS_BIG_ENDIAN && !TARGET_POWER && !TARGET_POWERPC)
- error ("-mcpu=common is not supported for little endian platforms");
-
#ifdef SUBTARGET_OVERRIDE_OPTIONS
SUBTARGET_OVERRIDE_OPTIONS;
#endif
info_ptr->main_p = 1;
#ifdef NAME__MAIN
+ info_ptr->calls_p = 1;
+
if (DECL_ARGUMENTS (current_function_decl))
{
int i;
info_ptr->main_save_p = 1;
info_ptr->main_size = 0;
- info_ptr->calls_p = 1;
for ((i = 0), (arg = DECL_ARGUMENTS (current_function_decl));
arg != NULL_TREE && i < 8;
/* Definitions of target machine for GNU compiler, for IBM RS/6000.
- Copyright (C) 1992, 1993, 1994, 1995 Free Software Foundation, Inc.
+ Copyright (C) 1992, 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
This file is part of GNU CC.
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -d_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=620: -D_ARCH_PPC} \
+%{mcpu=821: -D_ARCH_PPC} \
+%{mcpu=860: -D_ARCH_PPC}"
/* Define the options for the binder: Start text at 512, align all segments
to 512 bytes, and warn if there is text relocation.
enum processor_type
{PROCESSOR_RIOS1,
PROCESSOR_RIOS2,
+ PROCESSOR_MPCCORE,
PROCESSOR_PPC403,
PROCESSOR_PPC601,
PROCESSOR_PPC602,
: INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
case PROCESSOR_RIOS2: \
+ case PROCESSOR_MPCCORE: \
return COSTS_N_INSNS (2); \
case PROCESSOR_PPC601: \
case PROCESSOR_PPC603: \
return COSTS_N_INSNS (19); \
case PROCESSOR_RIOS2: \
return COSTS_N_INSNS (13); \
+ case PROCESSOR_MPCCORE: \
+ return COSTS_N_INSNS (6); \
case PROCESSOR_PPC403: \
return COSTS_N_INSNS (33); \
case PROCESSOR_PPC601: \
;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler
-;; Copyright (C) 1990, 91, 92, 93, 94, 1995 Free Software Foundation, Inc.
+;; Copyright (C) 1990, 91, 92, 93, 94, 95, 1996 Free Software Foundation, Inc.
;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
;; This file is part of GNU CC.
;; Processor type -- this attribute must exactly match the processor_type
;; enumeration in rs6000.h.
-(define_attr "cpu" "rios1,rios2,ppc403,ppc601,ppc602,ppc603,ppc604,ppc620"
+(define_attr "cpu" "rios1,rios2,mpccore,ppc403,ppc601,ppc602,ppc603,ppc604,ppc620"
(const (symbol_ref "rs6000_cpu_attr")))
; (define_function_unit NAME MULTIPLICITY SIMULTANEITY
; (POWER and 601 use Integer Unit)
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "load")
- (eq_attr "cpu" "ppc602,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "mpccore,ppc602,ppc603,ppc604,ppc620"))
2 1)
(define_function_unit "lsu" 1 0
(define_function_unit "lsu" 1 0
(and (eq_attr "type" "fpload")
- (eq_attr "cpu" "ppc602,ppc603"))
+ (eq_attr "cpu" "mpccore,ppc602,ppc603"))
2 1)
(define_function_unit "iu" 1 0
; Integer Unit (RIOS1, PPC601, PPC603)
; Trivial operations take one cycle which need not be listed here.
-(define_function_unit "iu" 1 0
- (and (eq_attr "type" "integer")
- (eq_attr "cpu" "rios1,ppc601"))
- 1 1)
-
(define_function_unit "iu" 1 0
(and (eq_attr "type" "imul")
(eq_attr "cpu" "rios1"))
(eq_attr "cpu" "rios2"))
13 13)
+; MPCCORE has separate IMUL/IDIV unit for multicycle instructions
+; Divide latency varies greatly from 2-11, use 6 as average
+(define_function_unit "imuldiv" 1 0
+ (and (eq_attr "type" "imul")
+ (eq_attr "cpu" "mpccore"))
+ 2 1)
+
+(define_function_unit "imuldiv" 1 0
+ (and (eq_attr "type" "idiv")
+ (eq_attr "cpu" "mpccore"))
+ 6 6)
+
; PPC604 has two units that perform integer operations
; and one unit for divide/multiply operations (and move
; from/to spr).
; able to fill the compare-branch delay, with insns on iu/fpu.
(define_function_unit "iu" 1 0
(and (eq_attr "type" "compare")
- (eq_attr "cpu" "rios1,ppc601"))
+ (eq_attr "cpu" "rios1,mpccore,ppc601"))
1 1)
(define_function_unit "iu2" 2 0
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "compare")
- (eq_attr "cpu" "rios1,rios2,ppc403,ppc601,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "rios1,rios2,ppc403,mpccore,ppc601,ppc603,ppc604,ppc620"))
4 1)
; different machines have different compare timings
(eq_attr "cpu" "ppc601,ppc602,ppc603,ppc604,ppc620"))
5 1)
+(define_function_unit "fpu" 1 0
+ (and (eq_attr "type" "fpcompare")
+ (eq_attr "cpu" "mpccore"))
+ 1 1)
+
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "mtjmpr")
(eq_attr "cpu" "rios1,rios2"))
(define_function_unit "bpu" 1 0
(and (eq_attr "type" "mtjmpr")
- (eq_attr "cpu" "ppc403,ppc601,ppc602,ppc603,ppc604,ppc620"))
+ (eq_attr "cpu" "ppc403,mpccore,ppc601,ppc602,ppc603,ppc604,ppc620"))
4 0)
; all jumps/branches are executing on the bpu, in 1 cycle, for all machines.
(eq_attr "type" "branch")
1 0)
-; Floating Point Unit (RIOS1, PPC601, PPC603, PPC604).
+; Floating Point Unit
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "fp,dmul")
(eq_attr "cpu" "rios1"))
2 0)
+(define_function_unit "fpu" 1 0
+ (and (eq_attr "type" "fp")
+ (eq_attr "cpu" "mpccore"))
+ 4 4)
+
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "fp")
(eq_attr "cpu" "ppc601"))
(eq_attr "cpu" "ppc602,ppc603,ppc604,ppc620"))
3 1)
+(define_function_unit "fpu" 1 0
+ (and (eq_attr "type" "dmul")
+ (eq_attr "cpu" "mpccore"))
+ 5 5)
+
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "dmul")
(eq_attr "cpu" "ppc601"))
(eq_attr "cpu" "ppc601"))
17 17)
+(define_function_unit "fpu" 1 0
+ (and (eq_attr "type" "sdiv")
+ (eq_attr "cpu" "mpccore"))
+ 10 10)
+
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "sdiv")
(eq_attr "cpu" "ppc602,ppc603,ppc604,ppc620"))
18 18)
+(define_function_unit "fpu" 1 0
+ (and (eq_attr "type" "ddiv")
+ (eq_attr "cpu" "mpccore"))
+ 17 17)
+
(define_function_unit "fpu" 1 0
(and (eq_attr "type" "ddiv")
(eq_attr "cpu" "ppc601,ppc604,ppc620"))
(lshiftrt:DI (mult:DI (sign_extend:DI (reg:SI 3))
(sign_extend:DI (reg:SI 4)))
(const_int 32))))
- (clobber (match_scratch:SI 0 "=l"))
- (clobber (reg:SI 4))]
+ (clobber (match_scratch:SI 0 "=l"))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __mulh")
(define_insn "quoss_call"
[(set (reg:SI 3)
(div:SI (reg:SI 3) (reg:SI 4)))
- (clobber (match_scratch:SI 0 "=l"))
- (clobber (match_scratch:CC 1 "=x"))
- (clobber (reg:CC 69))]
+ (clobber (match_scratch:SI 0 "=l"))]
"! TARGET_POWER && ! TARGET_POWERPC"
"bla __quoss")
(match_operand:SF 3 "gpc_reg_operand" "f")))]
"! TARGET_POWERPC && TARGET_HARD_FLOAT"
"{fma|fmadd} %0,%1,%2,%3"
- [(set_attr "type" "fp")])
+ [(set_attr "type" "dmul")])
(define_insn ""
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(match_operand:SF 3 "gpc_reg_operand" "f")))]
"! TARGET_POWERPC && TARGET_HARD_FLOAT"
"{fms|fmsub} %0,%1,%2,%3"
- [(set_attr "type" "fp")])
+ [(set_attr "type" "dmul")])
(define_insn ""
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(match_operand:SF 3 "gpc_reg_operand" "f"))))]
"! TARGET_POWERPC && TARGET_HARD_FLOAT"
"{fnma|fnmadd} %0,%1,%2,%3"
- [(set_attr "type" "fp")])
+ [(set_attr "type" "dmul")])
(define_insn ""
[(set (match_operand:SF 0 "gpc_reg_operand" "=f")
(match_operand:SF 3 "gpc_reg_operand" "f"))))]
"! TARGET_POWERPC && TARGET_HARD_FLOAT"
"{fnms|fnmsub} %0,%1,%2,%3"
- [(set_attr "type" "fp")])
+ [(set_attr "type" "dmul")])
(define_expand "sqrtsf2"
[(set (match_operand:SF 0 "gpc_reg_operand" "")
{
if (! TARGET_POWER && ! TARGET_POWERPC)
{
- int endian = (WORDS_BIG_ENDIAN == 0);
emit_move_insn (gen_rtx (REG, SImode, 3), operands[1]);
emit_move_insn (gen_rtx (REG, SImode, 4), operands[2]);
emit_insn (gen_mull_call ());
- emit_move_insn (operand_subword (operands[0], endian, 0, DImode),
- gen_rtx (REG, SImode, 3));
- emit_move_insn (operand_subword (operands[0], 1 - endian, 0, DImode),
- gen_rtx (REG, SImode, 4));
+ if (WORDS_BIG_ENDIAN)
+ emit_move_insn (operands[0], gen_rtx (REG, DImode, 3));
+ else
+ {
+ emit_move_insn (operand_subword (operands[0], 0, 0, DImode),
+ gen_rtx (REG, SImode, 3));
+ emit_move_insn (operand_subword (operands[0], 1, 0, DImode),
+ gen_rtx (REG, SImode, 4));
+ }
DONE;
}
else if (TARGET_POWER)
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(mult:DI (sign_extend:DI (match_operand:SI 1 "gpc_reg_operand" ""))
(sign_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))]
- "TARGET_POWERPC && ! TARGET_POWERPC64"
+ "TARGET_POWERPC && ! TARGET_POWERPC64 && reload_completed"
[(set (match_dup 3)
(truncate:SI
(lshiftrt:DI (mult:DI (sign_extend:DI (match_dup 1))
[(set (match_operand:DI 0 "gpc_reg_operand" "")
(mult:DI (zero_extend:DI (match_operand:SI 1 "gpc_reg_operand" ""))
(zero_extend:DI (match_operand:SI 2 "gpc_reg_operand" ""))))]
- "TARGET_POWERPC && ! TARGET_POWERPC64"
+ "TARGET_POWERPC && ! TARGET_POWERPC64 && reload_completed"
[(set (match_dup 3)
(truncate:SI
(lshiftrt:DI (mult:DI (zero_extend:DI (match_dup 1))
/* Target definitions for GNU compiler for PowerPC running System V.4
- Copyright (C) 1995, Free Software Foundation, Inc.
+ Copyright (C) 1995, 1996 Free Software Foundation, Inc.
Contributed by Cygnus Support.
This file is part of GNU CC.
%{mcpu=rsc: -mpwr} \
%{mcpu=rsc1: -mpwr} \
%{mcpu=403: -mppc} \
+%{mcpu=505: -mppc} \
%{mcpu=601: -m601} \
%{mcpu=602: -mppc} \
%{mcpu=603: -mppc} \
%{mcpu=603e: -mppc} \
%{mcpu=604: -mppc} \
%{mcpu=620: -mppc} \
+%{mcpu=821: -mppc} \
+%{mcpu=860: -mppc} \
%{V} %{v:%{!V:-V}} %{Qy:} %{!Qn:-Qy} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \
%{mrelocatable} %{mrelocatable-lib} %{memb} \
%{mlittle} %{mlittle-endian} %{mbig} %{mbig-endian}"
%{mcpu=rsc: -D_ARCH_PWR} \
%{mcpu=rsc1: -D_ARCH_PWR} \
%{mcpu=403: -D_ARCH_PPC} \
+%{mcpu=505: -D_ARCH_PPC} \
%{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
%{mcpu=602: -D_ARCH_PPC} \
%{mcpu=603: -D_ARCH_PPC} \
%{mcpu=603e: -D_ARCH_PPC} \
%{mcpu=604: -D_ARCH_PPC} \
-%{mcpu=620: -D_ARCH_PPC}"
+%{mcpu=620: -D_ARCH_PPC} \
+%{mcpu=821: -D_ARCH_PPC} \
+%{mcpu=860: -D_ARCH_PPC}"
/* Define this macro as a C expression for the initializer of an
array of string to tell the driver program which options are
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