--- /dev/null
+\r
+/*============================================================================\r
+\r
+This C source file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic\r
+Package, Release 2b.\r
+\r
+Written by John R. Hauser. This work was made possible in part by the\r
+International Computer Science Institute, located at Suite 600, 1947 Center\r
+Street, Berkeley, California 94704. Funding was partially provided by the\r
+National Science Foundation under grant MIP-9311980. The original version\r
+of this code was written as part of a project to build a fixed-point vector\r
+processor in collaboration with the University of California at Berkeley,\r
+overseen by Profs. Nelson Morgan and John Wawrzynek. More information\r
+is available through the Web page `http://www.cs.berkeley.edu/~jhauser/\r
+arithmetic/SoftFloat.html'.\r
+\r
+THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort has\r
+been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES\r
+RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS\r
+AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,\r
+COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE\r
+EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE\r
+INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR\r
+OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.\r
+\r
+Derivative works are acceptable, even for commercial purposes, so long as\r
+(1) the source code for the derivative work includes prominent notice that\r
+the work is derivative, and (2) the source code includes prominent notice with\r
+these four paragraphs for those parts of this code that are retained.\r
+\r
+=============================================================================*/\r
+\r
+#include "milieu.h"\r
+#include "softfloat.h"\r
+\r
+/*----------------------------------------------------------------------------\r
+| Floating-point rounding mode, extended double-precision rounding precision,\r
+| and exception flags.\r
+*----------------------------------------------------------------------------*/\r
+int8 float_rounding_mode = float_round_nearest_even;\r
+int8 float_exception_flags = 0;\r
+#ifdef FLOATX80\r
+int8 floatx80_rounding_precision = 80;\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Primitive arithmetic functions, including multi-word arithmetic, and\r
+| division and square root approximations. (Can be specialized to target if\r
+| desired.)\r
+*----------------------------------------------------------------------------*/\r
+#include "softfloat-macros"\r
+\r
+/*----------------------------------------------------------------------------\r
+| Functions and definitions to determine: (1) whether tininess for underflow\r
+| is detected before or after rounding by default, (2) what (if anything)\r
+| happens when exceptions are raised, (3) how signaling NaNs are distinguished\r
+| from quiet NaNs, (4) the default generated quiet NaNs, and (5) how NaNs\r
+| are propagated from function inputs to output. These details are target-\r
+| specific.\r
+*----------------------------------------------------------------------------*/\r
+#include "softfloat-specialize"\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes a 64-bit fixed-point value `absZ' with binary point between bits 6\r
+| and 7, and returns the properly rounded 32-bit integer corresponding to the\r
+| input. If `zSign' is 1, the input is negated before being converted to an\r
+| integer. Bit 63 of `absZ' must be zero. Ordinarily, the fixed-point input\r
+| is simply rounded to an integer, with the inexact exception raised if the\r
+| input cannot be represented exactly as an integer. However, if the fixed-\r
+| point input is too large, the invalid exception is raised and the largest\r
+| positive or negative integer is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static int32 roundAndPackInt32( flag zSign, bits64 absZ )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven;\r
+ int8 roundIncrement, roundBits;\r
+ int32 z;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ roundIncrement = 0x40;\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ roundIncrement = 0;\r
+ }\r
+ else {\r
+ roundIncrement = 0x7F;\r
+ if ( zSign ) {\r
+ if ( roundingMode == float_round_up ) roundIncrement = 0;\r
+ }\r
+ else {\r
+ if ( roundingMode == float_round_down ) roundIncrement = 0;\r
+ }\r
+ }\r
+ }\r
+ roundBits = absZ & 0x7F;\r
+ absZ = ( absZ + roundIncrement )>>7;\r
+ absZ &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );\r
+ z = absZ;\r
+ if ( zSign ) z = - z;\r
+ if ( ( absZ>>32 ) || ( z && ( ( z < 0 ) ^ zSign ) ) ) {\r
+ float_raise( float_flag_invalid );\r
+ return zSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
+ }\r
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes the 128-bit fixed-point value formed by concatenating `absZ0' and\r
+| `absZ1', with binary point between bits 63 and 64 (between the input words),\r
+| and returns the properly rounded 64-bit integer corresponding to the input.\r
+| If `zSign' is 1, the input is negated before being converted to an integer.\r
+| Ordinarily, the fixed-point input is simply rounded to an integer, with\r
+| the inexact exception raised if the input cannot be represented exactly as\r
+| an integer. However, if the fixed-point input is too large, the invalid\r
+| exception is raised and the largest positive or negative integer is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static int64 roundAndPackInt64( flag zSign, bits64 absZ0, bits64 absZ1 )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven, increment;\r
+ int64 z;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ increment = ( (sbits64) absZ1 < 0 );\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ increment = 0;\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && absZ1;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && absZ1;\r
+ }\r
+ }\r
+ }\r
+ if ( increment ) {\r
+ ++absZ0;\r
+ if ( absZ0 == 0 ) goto overflow;\r
+ absZ0 &= ~ ( ( (bits64) ( absZ1<<1 ) == 0 ) & roundNearestEven );\r
+ }\r
+ z = absZ0;\r
+ if ( zSign ) z = - z;\r
+ if ( z && ( ( z < 0 ) ^ zSign ) ) {\r
+ overflow:\r
+ float_raise( float_flag_invalid );\r
+ return\r
+ zSign ? (sbits64) LIT64( 0x8000000000000000 )\r
+ : LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ if ( absZ1 ) float_exception_flags |= float_flag_inexact;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the fraction bits of the single-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE bits32 extractFloat32Frac( float32 a )\r
+{\r
+\r
+ return a & 0x007FFFFF;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the exponent bits of the single-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE int16 extractFloat32Exp( float32 a )\r
+{\r
+\r
+ return ( a>>23 ) & 0xFF;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the sign bit of the single-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE flag extractFloat32Sign( float32 a )\r
+{\r
+\r
+ return a>>31;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Normalizes the subnormal single-precision floating-point value represented\r
+| by the denormalized significand `aSig'. The normalized exponent and\r
+| significand are stored at the locations pointed to by `zExpPtr' and\r
+| `zSigPtr', respectively.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static void\r
+ normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros32( aSig ) - 8;\r
+ *zSigPtr = aSig<<shiftCount;\r
+ *zExpPtr = 1 - shiftCount;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a\r
+| single-precision floating-point value, returning the result. After being\r
+| shifted into the proper positions, the three fields are simply added\r
+| together to form the result. This means that any integer portion of `zSig'\r
+| will be added into the exponent. Since a properly normalized significand\r
+| will have an integer portion equal to 1, the `zExp' input should be 1 less\r
+| than the desired result exponent whenever `zSig' is a complete, normalized\r
+| significand.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )\r
+{\r
+\r
+ return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and significand `zSig', and returns the proper single-precision floating-\r
+| point value corresponding to the abstract input. Ordinarily, the abstract\r
+| value is simply rounded and packed into the single-precision format, with\r
+| the inexact exception raised if the abstract input cannot be represented\r
+| exactly. However, if the abstract value is too large, the overflow and\r
+| inexact exceptions are raised and an infinity or maximal finite value is\r
+| returned. If the abstract value is too small, the input value is rounded to\r
+| a subnormal number, and the underflow and inexact exceptions are raised if\r
+| the abstract input cannot be represented exactly as a subnormal single-\r
+| precision floating-point number.\r
+| The input significand `zSig' has its binary point between bits 30\r
+| and 29, which is 7 bits to the left of the usual location. This shifted\r
+| significand must be normalized or smaller. If `zSig' is not normalized,\r
+| `zExp' must be 0; in that case, the result returned is a subnormal number,\r
+| and it must not require rounding. In the usual case that `zSig' is\r
+| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.\r
+| The handling of underflow and overflow follows the IEC/IEEE Standard for\r
+| Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven;\r
+ int8 roundIncrement, roundBits;\r
+ flag isTiny;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ roundIncrement = 0x40;\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ roundIncrement = 0;\r
+ }\r
+ else {\r
+ roundIncrement = 0x7F;\r
+ if ( zSign ) {\r
+ if ( roundingMode == float_round_up ) roundIncrement = 0;\r
+ }\r
+ else {\r
+ if ( roundingMode == float_round_down ) roundIncrement = 0;\r
+ }\r
+ }\r
+ }\r
+ roundBits = zSig & 0x7F;\r
+ if ( 0xFD <= (bits16) zExp ) {\r
+ if ( ( 0xFD < zExp )\r
+ || ( ( zExp == 0xFD )\r
+ && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )\r
+ ) {\r
+ float_raise( float_flag_overflow | float_flag_inexact );\r
+ return packFloat32( zSign, 0xFF, 0 ) - ( roundIncrement == 0 );\r
+ }\r
+ if ( zExp < 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < -1 )\r
+ || ( zSig + roundIncrement < 0x80000000 );\r
+ shift32RightJamming( zSig, - zExp, &zSig );\r
+ zExp = 0;\r
+ roundBits = zSig & 0x7F;\r
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );\r
+ }\r
+ }\r
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;\r
+ zSig = ( zSig + roundIncrement )>>7;\r
+ zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );\r
+ if ( zSig == 0 ) zExp = 0;\r
+ return packFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and significand `zSig', and returns the proper single-precision floating-\r
+| point value corresponding to the abstract input. This routine is just like\r
+| `roundAndPackFloat32' except that `zSig' does not have to be normalized.\r
+| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''\r
+| floating-point exponent.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float32\r
+ normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros32( zSig ) - 1;\r
+ return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the fraction bits of the double-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE bits64 extractFloat64Frac( float64 a )\r
+{\r
+\r
+ return a & LIT64( 0x000FFFFFFFFFFFFF );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the exponent bits of the double-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE int16 extractFloat64Exp( float64 a )\r
+{\r
+\r
+ return ( a>>52 ) & 0x7FF;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the sign bit of the double-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE flag extractFloat64Sign( float64 a )\r
+{\r
+\r
+ return a>>63;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Normalizes the subnormal double-precision floating-point value represented\r
+| by the denormalized significand `aSig'. The normalized exponent and\r
+| significand are stored at the locations pointed to by `zExpPtr' and\r
+| `zSigPtr', respectively.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static void\r
+ normalizeFloat64Subnormal( bits64 aSig, int16 *zExpPtr, bits64 *zSigPtr )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros64( aSig ) - 11;\r
+ *zSigPtr = aSig<<shiftCount;\r
+ *zExpPtr = 1 - shiftCount;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a\r
+| double-precision floating-point value, returning the result. After being\r
+| shifted into the proper positions, the three fields are simply added\r
+| together to form the result. This means that any integer portion of `zSig'\r
+| will be added into the exponent. Since a properly normalized significand\r
+| will have an integer portion equal to 1, the `zExp' input should be 1 less\r
+| than the desired result exponent whenever `zSig' is a complete, normalized\r
+| significand.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE float64 packFloat64( flag zSign, int16 zExp, bits64 zSig )\r
+{\r
+\r
+ return ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<52 ) + zSig;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and significand `zSig', and returns the proper double-precision floating-\r
+| point value corresponding to the abstract input. Ordinarily, the abstract\r
+| value is simply rounded and packed into the double-precision format, with\r
+| the inexact exception raised if the abstract input cannot be represented\r
+| exactly. However, if the abstract value is too large, the overflow and\r
+| inexact exceptions are raised and an infinity or maximal finite value is\r
+| returned. If the abstract value is too small, the input value is rounded\r
+| to a subnormal number, and the underflow and inexact exceptions are raised\r
+| if the abstract input cannot be represented exactly as a subnormal double-\r
+| precision floating-point number.\r
+| The input significand `zSig' has its binary point between bits 62\r
+| and 61, which is 10 bits to the left of the usual location. This shifted\r
+| significand must be normalized or smaller. If `zSig' is not normalized,\r
+| `zExp' must be 0; in that case, the result returned is a subnormal number,\r
+| and it must not require rounding. In the usual case that `zSig' is\r
+| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.\r
+| The handling of underflow and overflow follows the IEC/IEEE Standard for\r
+| Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float64 roundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven;\r
+ int16 roundIncrement, roundBits;\r
+ flag isTiny;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ roundIncrement = 0x200;\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ roundIncrement = 0;\r
+ }\r
+ else {\r
+ roundIncrement = 0x3FF;\r
+ if ( zSign ) {\r
+ if ( roundingMode == float_round_up ) roundIncrement = 0;\r
+ }\r
+ else {\r
+ if ( roundingMode == float_round_down ) roundIncrement = 0;\r
+ }\r
+ }\r
+ }\r
+ roundBits = zSig & 0x3FF;\r
+ if ( 0x7FD <= (bits16) zExp ) {\r
+ if ( ( 0x7FD < zExp )\r
+ || ( ( zExp == 0x7FD )\r
+ && ( (sbits64) ( zSig + roundIncrement ) < 0 ) )\r
+ ) {\r
+ float_raise( float_flag_overflow | float_flag_inexact );\r
+ return packFloat64( zSign, 0x7FF, 0 ) - ( roundIncrement == 0 );\r
+ }\r
+ if ( zExp < 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < -1 )\r
+ || ( zSig + roundIncrement < LIT64( 0x8000000000000000 ) );\r
+ shift64RightJamming( zSig, - zExp, &zSig );\r
+ zExp = 0;\r
+ roundBits = zSig & 0x3FF;\r
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );\r
+ }\r
+ }\r
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;\r
+ zSig = ( zSig + roundIncrement )>>10;\r
+ zSig &= ~ ( ( ( roundBits ^ 0x200 ) == 0 ) & roundNearestEven );\r
+ if ( zSig == 0 ) zExp = 0;\r
+ return packFloat64( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and significand `zSig', and returns the proper double-precision floating-\r
+| point value corresponding to the abstract input. This routine is just like\r
+| `roundAndPackFloat64' except that `zSig' does not have to be normalized.\r
+| Bit 63 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''\r
+| floating-point exponent.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float64\r
+ normalizeRoundAndPackFloat64( flag zSign, int16 zExp, bits64 zSig )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros64( zSig ) - 1;\r
+ return roundAndPackFloat64( zSign, zExp - shiftCount, zSig<<shiftCount );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the fraction bits of the extended double-precision floating-point\r
+| value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE bits64 extractFloatx80Frac( floatx80 a )\r
+{\r
+\r
+ return a.low;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the exponent bits of the extended double-precision floating-point\r
+| value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE int32 extractFloatx80Exp( floatx80 a )\r
+{\r
+\r
+ return a.high & 0x7FFF;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the sign bit of the extended double-precision floating-point value\r
+| `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE flag extractFloatx80Sign( floatx80 a )\r
+{\r
+\r
+ return a.high>>15;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Normalizes the subnormal extended double-precision floating-point value\r
+| represented by the denormalized significand `aSig'. The normalized exponent\r
+| and significand are stored at the locations pointed to by `zExpPtr' and\r
+| `zSigPtr', respectively.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static void\r
+ normalizeFloatx80Subnormal( bits64 aSig, int32 *zExpPtr, bits64 *zSigPtr )\r
+{\r
+ int8 shiftCount;\r
+\r
+ shiftCount = countLeadingZeros64( aSig );\r
+ *zSigPtr = aSig<<shiftCount;\r
+ *zExpPtr = 1 - shiftCount;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Packs the sign `zSign', exponent `zExp', and significand `zSig' into an\r
+| extended double-precision floating-point value, returning the result.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE floatx80 packFloatx80( flag zSign, int32 zExp, bits64 zSig )\r
+{\r
+ floatx80 z;\r
+\r
+ z.low = zSig;\r
+ z.high = ( ( (bits16) zSign )<<15 ) + zExp;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and extended significand formed by the concatenation of `zSig0' and `zSig1',\r
+| and returns the proper extended double-precision floating-point value\r
+| corresponding to the abstract input. Ordinarily, the abstract value is\r
+| rounded and packed into the extended double-precision format, with the\r
+| inexact exception raised if the abstract input cannot be represented\r
+| exactly. However, if the abstract value is too large, the overflow and\r
+| inexact exceptions are raised and an infinity or maximal finite value is\r
+| returned. If the abstract value is too small, the input value is rounded to\r
+| a subnormal number, and the underflow and inexact exceptions are raised if\r
+| the abstract input cannot be represented exactly as a subnormal extended\r
+| double-precision floating-point number.\r
+| If `roundingPrecision' is 32 or 64, the result is rounded to the same\r
+| number of bits as single or double precision, respectively. Otherwise, the\r
+| result is rounded to the full precision of the extended double-precision\r
+| format.\r
+| The input significand must be normalized or smaller. If the input\r
+| significand is not normalized, `zExp' must be 0; in that case, the result\r
+| returned is a subnormal number, and it must not require rounding. The\r
+| handling of underflow and overflow follows the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static floatx80\r
+ roundAndPackFloatx80(\r
+ int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1\r
+ )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven, increment, isTiny;\r
+ int64 roundIncrement, roundMask, roundBits;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ if ( roundingPrecision == 80 ) goto precision80;\r
+ if ( roundingPrecision == 64 ) {\r
+ roundIncrement = LIT64( 0x0000000000000400 );\r
+ roundMask = LIT64( 0x00000000000007FF );\r
+ }\r
+ else if ( roundingPrecision == 32 ) {\r
+ roundIncrement = LIT64( 0x0000008000000000 );\r
+ roundMask = LIT64( 0x000000FFFFFFFFFF );\r
+ }\r
+ else {\r
+ goto precision80;\r
+ }\r
+ zSig0 |= ( zSig1 != 0 );\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ roundIncrement = 0;\r
+ }\r
+ else {\r
+ roundIncrement = roundMask;\r
+ if ( zSign ) {\r
+ if ( roundingMode == float_round_up ) roundIncrement = 0;\r
+ }\r
+ else {\r
+ if ( roundingMode == float_round_down ) roundIncrement = 0;\r
+ }\r
+ }\r
+ }\r
+ roundBits = zSig0 & roundMask;\r
+ if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {\r
+ if ( ( 0x7FFE < zExp )\r
+ || ( ( zExp == 0x7FFE ) && ( zSig0 + roundIncrement < zSig0 ) )\r
+ ) {\r
+ goto overflow;\r
+ }\r
+ if ( zExp <= 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < 0 )\r
+ || ( zSig0 <= zSig0 + roundIncrement );\r
+ shift64RightJamming( zSig0, 1 - zExp, &zSig0 );\r
+ zExp = 0;\r
+ roundBits = zSig0 & roundMask;\r
+ if ( isTiny && roundBits ) float_raise( float_flag_underflow );\r
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;\r
+ zSig0 += roundIncrement;\r
+ if ( (sbits64) zSig0 < 0 ) zExp = 1;\r
+ roundIncrement = roundMask + 1;\r
+ if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {\r
+ roundMask |= roundIncrement;\r
+ }\r
+ zSig0 &= ~ roundMask;\r
+ return packFloatx80( zSign, zExp, zSig0 );\r
+ }\r
+ }\r
+ if ( roundBits ) float_exception_flags |= float_flag_inexact;\r
+ zSig0 += roundIncrement;\r
+ if ( zSig0 < roundIncrement ) {\r
+ ++zExp;\r
+ zSig0 = LIT64( 0x8000000000000000 );\r
+ }\r
+ roundIncrement = roundMask + 1;\r
+ if ( roundNearestEven && ( roundBits<<1 == roundIncrement ) ) {\r
+ roundMask |= roundIncrement;\r
+ }\r
+ zSig0 &= ~ roundMask;\r
+ if ( zSig0 == 0 ) zExp = 0;\r
+ return packFloatx80( zSign, zExp, zSig0 );\r
+ precision80:\r
+ increment = ( (sbits64) zSig1 < 0 );\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ increment = 0;\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && zSig1;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && zSig1;\r
+ }\r
+ }\r
+ }\r
+ if ( 0x7FFD <= (bits32) ( zExp - 1 ) ) {\r
+ if ( ( 0x7FFE < zExp )\r
+ || ( ( zExp == 0x7FFE )\r
+ && ( zSig0 == LIT64( 0xFFFFFFFFFFFFFFFF ) )\r
+ && increment\r
+ )\r
+ ) {\r
+ roundMask = 0;\r
+ overflow:\r
+ float_raise( float_flag_overflow | float_flag_inexact );\r
+ if ( ( roundingMode == float_round_to_zero )\r
+ || ( zSign && ( roundingMode == float_round_up ) )\r
+ || ( ! zSign && ( roundingMode == float_round_down ) )\r
+ ) {\r
+ return packFloatx80( zSign, 0x7FFE, ~ roundMask );\r
+ }\r
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( zExp <= 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < 0 )\r
+ || ! increment\r
+ || ( zSig0 < LIT64( 0xFFFFFFFFFFFFFFFF ) );\r
+ shift64ExtraRightJamming( zSig0, zSig1, 1 - zExp, &zSig0, &zSig1 );\r
+ zExp = 0;\r
+ if ( isTiny && zSig1 ) float_raise( float_flag_underflow );\r
+ if ( zSig1 ) float_exception_flags |= float_flag_inexact;\r
+ if ( roundNearestEven ) {\r
+ increment = ( (sbits64) zSig1 < 0 );\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && zSig1;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && zSig1;\r
+ }\r
+ }\r
+ if ( increment ) {\r
+ ++zSig0;\r
+ zSig0 &=\r
+ ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );\r
+ if ( (sbits64) zSig0 < 0 ) zExp = 1;\r
+ }\r
+ return packFloatx80( zSign, zExp, zSig0 );\r
+ }\r
+ }\r
+ if ( zSig1 ) float_exception_flags |= float_flag_inexact;\r
+ if ( increment ) {\r
+ ++zSig0;\r
+ if ( zSig0 == 0 ) {\r
+ ++zExp;\r
+ zSig0 = LIT64( 0x8000000000000000 );\r
+ }\r
+ else {\r
+ zSig0 &= ~ ( ( (bits64) ( zSig1<<1 ) == 0 ) & roundNearestEven );\r
+ }\r
+ }\r
+ else {\r
+ if ( zSig0 == 0 ) zExp = 0;\r
+ }\r
+ return packFloatx80( zSign, zExp, zSig0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent\r
+| `zExp', and significand formed by the concatenation of `zSig0' and `zSig1',\r
+| and returns the proper extended double-precision floating-point value\r
+| corresponding to the abstract input. This routine is just like\r
+| `roundAndPackFloatx80' except that the input significand does not have to be\r
+| normalized.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static floatx80\r
+ normalizeRoundAndPackFloatx80(\r
+ int8 roundingPrecision, flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1\r
+ )\r
+{\r
+ int8 shiftCount;\r
+\r
+ if ( zSig0 == 0 ) {\r
+ zSig0 = zSig1;\r
+ zSig1 = 0;\r
+ zExp -= 64;\r
+ }\r
+ shiftCount = countLeadingZeros64( zSig0 );\r
+ shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );\r
+ zExp -= shiftCount;\r
+ return\r
+ roundAndPackFloatx80( roundingPrecision, zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the least-significant 64 fraction bits of the quadruple-precision\r
+| floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE bits64 extractFloat128Frac1( float128 a )\r
+{\r
+\r
+ return a.low;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the most-significant 48 fraction bits of the quadruple-precision\r
+| floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE bits64 extractFloat128Frac0( float128 a )\r
+{\r
+\r
+ return a.high & LIT64( 0x0000FFFFFFFFFFFF );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the exponent bits of the quadruple-precision floating-point value\r
+| `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE int32 extractFloat128Exp( float128 a )\r
+{\r
+\r
+ return ( a.high>>48 ) & 0x7FFF;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the sign bit of the quadruple-precision floating-point value `a'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE flag extractFloat128Sign( float128 a )\r
+{\r
+\r
+ return a.high>>63;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Normalizes the subnormal quadruple-precision floating-point value\r
+| represented by the denormalized significand formed by the concatenation of\r
+| `aSig0' and `aSig1'. The normalized exponent is stored at the location\r
+| pointed to by `zExpPtr'. The most significant 49 bits of the normalized\r
+| significand are stored at the location pointed to by `zSig0Ptr', and the\r
+| least significant 64 bits of the normalized significand are stored at the\r
+| location pointed to by `zSig1Ptr'.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static void\r
+ normalizeFloat128Subnormal(\r
+ bits64 aSig0,\r
+ bits64 aSig1,\r
+ int32 *zExpPtr,\r
+ bits64 *zSig0Ptr,\r
+ bits64 *zSig1Ptr\r
+ )\r
+{\r
+ int8 shiftCount;\r
+\r
+ if ( aSig0 == 0 ) {\r
+ shiftCount = countLeadingZeros64( aSig1 ) - 15;\r
+ if ( shiftCount < 0 ) {\r
+ *zSig0Ptr = aSig1>>( - shiftCount );\r
+ *zSig1Ptr = aSig1<<( shiftCount & 63 );\r
+ }\r
+ else {\r
+ *zSig0Ptr = aSig1<<shiftCount;\r
+ *zSig1Ptr = 0;\r
+ }\r
+ *zExpPtr = - shiftCount - 63;\r
+ }\r
+ else {\r
+ shiftCount = countLeadingZeros64( aSig0 ) - 15;\r
+ shortShift128Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );\r
+ *zExpPtr = 1 - shiftCount;\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Packs the sign `zSign', the exponent `zExp', and the significand formed\r
+| by the concatenation of `zSig0' and `zSig1' into a quadruple-precision\r
+| floating-point value, returning the result. After being shifted into the\r
+| proper positions, the three fields `zSign', `zExp', and `zSig0' are simply\r
+| added together to form the most significant 32 bits of the result. This\r
+| means that any integer portion of `zSig0' will be added into the exponent.\r
+| Since a properly normalized significand will have an integer portion equal\r
+| to 1, the `zExp' input should be 1 less than the desired result exponent\r
+| whenever `zSig0' and `zSig1' concatenated form a complete, normalized\r
+| significand.\r
+*----------------------------------------------------------------------------*/\r
+\r
+INLINE float128\r
+ packFloat128( flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )\r
+{\r
+ float128 z;\r
+\r
+ z.low = zSig1;\r
+ z.high = ( ( (bits64) zSign )<<63 ) + ( ( (bits64) zExp )<<48 ) + zSig0;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and extended significand formed by the concatenation of `zSig0', `zSig1',\r
+| and `zSig2', and returns the proper quadruple-precision floating-point value\r
+| corresponding to the abstract input. Ordinarily, the abstract value is\r
+| simply rounded and packed into the quadruple-precision format, with the\r
+| inexact exception raised if the abstract input cannot be represented\r
+| exactly. However, if the abstract value is too large, the overflow and\r
+| inexact exceptions are raised and an infinity or maximal finite value is\r
+| returned. If the abstract value is too small, the input value is rounded to\r
+| a subnormal number, and the underflow and inexact exceptions are raised if\r
+| the abstract input cannot be represented exactly as a subnormal quadruple-\r
+| precision floating-point number.\r
+| The input significand must be normalized or smaller. If the input\r
+| significand is not normalized, `zExp' must be 0; in that case, the result\r
+| returned is a subnormal number, and it must not require rounding. In the\r
+| usual case that the input significand is normalized, `zExp' must be 1 less\r
+| than the ``true'' floating-point exponent. The handling of underflow and\r
+| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float128\r
+ roundAndPackFloat128(\r
+ flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1, bits64 zSig2 )\r
+{\r
+ int8 roundingMode;\r
+ flag roundNearestEven, increment, isTiny;\r
+\r
+ roundingMode = float_rounding_mode;\r
+ roundNearestEven = ( roundingMode == float_round_nearest_even );\r
+ increment = ( (sbits64) zSig2 < 0 );\r
+ if ( ! roundNearestEven ) {\r
+ if ( roundingMode == float_round_to_zero ) {\r
+ increment = 0;\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && zSig2;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && zSig2;\r
+ }\r
+ }\r
+ }\r
+ if ( 0x7FFD <= (bits32) zExp ) {\r
+ if ( ( 0x7FFD < zExp )\r
+ || ( ( zExp == 0x7FFD )\r
+ && eq128(\r
+ LIT64( 0x0001FFFFFFFFFFFF ),\r
+ LIT64( 0xFFFFFFFFFFFFFFFF ),\r
+ zSig0,\r
+ zSig1\r
+ )\r
+ && increment\r
+ )\r
+ ) {\r
+ float_raise( float_flag_overflow | float_flag_inexact );\r
+ if ( ( roundingMode == float_round_to_zero )\r
+ || ( zSign && ( roundingMode == float_round_up ) )\r
+ || ( ! zSign && ( roundingMode == float_round_down ) )\r
+ ) {\r
+ return\r
+ packFloat128(\r
+ zSign,\r
+ 0x7FFE,\r
+ LIT64( 0x0000FFFFFFFFFFFF ),\r
+ LIT64( 0xFFFFFFFFFFFFFFFF )\r
+ );\r
+ }\r
+ return packFloat128( zSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( zExp < 0 ) {\r
+ isTiny =\r
+ ( float_detect_tininess == float_tininess_before_rounding )\r
+ || ( zExp < -1 )\r
+ || ! increment\r
+ || lt128(\r
+ zSig0,\r
+ zSig1,\r
+ LIT64( 0x0001FFFFFFFFFFFF ),\r
+ LIT64( 0xFFFFFFFFFFFFFFFF )\r
+ );\r
+ shift128ExtraRightJamming(\r
+ zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );\r
+ zExp = 0;\r
+ if ( isTiny && zSig2 ) float_raise( float_flag_underflow );\r
+ if ( roundNearestEven ) {\r
+ increment = ( (sbits64) zSig2 < 0 );\r
+ }\r
+ else {\r
+ if ( zSign ) {\r
+ increment = ( roundingMode == float_round_down ) && zSig2;\r
+ }\r
+ else {\r
+ increment = ( roundingMode == float_round_up ) && zSig2;\r
+ }\r
+ }\r
+ }\r
+ }\r
+ if ( zSig2 ) float_exception_flags |= float_flag_inexact;\r
+ if ( increment ) {\r
+ add128( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );\r
+ zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );\r
+ }\r
+ else {\r
+ if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;\r
+ }\r
+ return packFloat128( zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
+| and significand formed by the concatenation of `zSig0' and `zSig1', and\r
+| returns the proper quadruple-precision floating-point value corresponding\r
+| to the abstract input. This routine is just like `roundAndPackFloat128'\r
+| except that the input significand has fewer bits and does not have to be\r
+| normalized. In all cases, `zExp' must be 1 less than the ``true'' floating-\r
+| point exponent.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float128\r
+ normalizeRoundAndPackFloat128(\r
+ flag zSign, int32 zExp, bits64 zSig0, bits64 zSig1 )\r
+{\r
+ int8 shiftCount;\r
+ bits64 zSig2;\r
+\r
+ if ( zSig0 == 0 ) {\r
+ zSig0 = zSig1;\r
+ zSig1 = 0;\r
+ zExp -= 64;\r
+ }\r
+ shiftCount = countLeadingZeros64( zSig0 ) - 15;\r
+ if ( 0 <= shiftCount ) {\r
+ zSig2 = 0;\r
+ shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );\r
+ }\r
+ else {\r
+ shift128ExtraRightJamming(\r
+ zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );\r
+ }\r
+ zExp -= shiftCount;\r
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 32-bit two's complement integer `a'\r
+| to the single-precision floating-point format. The conversion is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 int32_to_float32( int32 a )\r
+{\r
+ flag zSign;\r
+\r
+ if ( a == 0 ) return 0;\r
+ if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );\r
+ zSign = ( a < 0 );\r
+ return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 32-bit two's complement integer `a'\r
+| to the double-precision floating-point format. The conversion is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 int32_to_float64( int32 a )\r
+{\r
+ flag zSign;\r
+ uint32 absA;\r
+ int8 shiftCount;\r
+ bits64 zSig;\r
+\r
+ if ( a == 0 ) return 0;\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros32( absA ) + 21;\r
+ zSig = absA;\r
+ return packFloat64( zSign, 0x432 - shiftCount, zSig<<shiftCount );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 32-bit two's complement integer `a'\r
+| to the extended double-precision floating-point format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 int32_to_floatx80( int32 a )\r
+{\r
+ flag zSign;\r
+ uint32 absA;\r
+ int8 shiftCount;\r
+ bits64 zSig;\r
+\r
+ if ( a == 0 ) return packFloatx80( 0, 0, 0 );\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros32( absA ) + 32;\r
+ zSig = absA;\r
+ return packFloatx80( zSign, 0x403E - shiftCount, zSig<<shiftCount );\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 32-bit two's complement integer `a' to\r
+| the quadruple-precision floating-point format. The conversion is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 int32_to_float128( int32 a )\r
+{\r
+ flag zSign;\r
+ uint32 absA;\r
+ int8 shiftCount;\r
+ bits64 zSig0;\r
+\r
+ if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros32( absA ) + 17;\r
+ zSig0 = absA;\r
+ return packFloat128( zSign, 0x402E - shiftCount, zSig0<<shiftCount, 0 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 64-bit two's complement integer `a'\r
+| to the single-precision floating-point format. The conversion is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 int64_to_float32( int64 a )\r
+{\r
+ flag zSign;\r
+ uint64 absA;\r
+ int8 shiftCount;\r
+ bits32 zSig;\r
+\r
+ if ( a == 0 ) return 0;\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros64( absA ) - 40;\r
+ if ( 0 <= shiftCount ) {\r
+ return packFloat32( zSign, 0x95 - shiftCount, absA<<shiftCount );\r
+ }\r
+ else {\r
+ shiftCount += 7;\r
+ if ( shiftCount < 0 ) {\r
+ shift64RightJamming( absA, - shiftCount, &absA );\r
+ }\r
+ else {\r
+ absA <<= shiftCount;\r
+ }\r
+ return roundAndPackFloat32( zSign, 0x9C - shiftCount, absA );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 64-bit two's complement integer `a'\r
+| to the double-precision floating-point format. The conversion is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 int64_to_float64( int64 a )\r
+{\r
+ flag zSign;\r
+\r
+ if ( a == 0 ) return 0;\r
+ if ( a == (sbits64) LIT64( 0x8000000000000000 ) ) {\r
+ return packFloat64( 1, 0x43E, 0 );\r
+ }\r
+ zSign = ( a < 0 );\r
+ return normalizeRoundAndPackFloat64( zSign, 0x43C, zSign ? - a : a );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 64-bit two's complement integer `a'\r
+| to the extended double-precision floating-point format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 int64_to_floatx80( int64 a )\r
+{\r
+ flag zSign;\r
+ uint64 absA;\r
+ int8 shiftCount;\r
+\r
+ if ( a == 0 ) return packFloatx80( 0, 0, 0 );\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros64( absA );\r
+ return packFloatx80( zSign, 0x403E - shiftCount, absA<<shiftCount );\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the 64-bit two's complement integer `a' to\r
+| the quadruple-precision floating-point format. The conversion is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 int64_to_float128( int64 a )\r
+{\r
+ flag zSign;\r
+ uint64 absA;\r
+ int8 shiftCount;\r
+ int32 zExp;\r
+ bits64 zSig0, zSig1;\r
+\r
+ if ( a == 0 ) return packFloat128( 0, 0, 0, 0 );\r
+ zSign = ( a < 0 );\r
+ absA = zSign ? - a : a;\r
+ shiftCount = countLeadingZeros64( absA ) + 49;\r
+ zExp = 0x406E - shiftCount;\r
+ if ( 64 <= shiftCount ) {\r
+ zSig1 = 0;\r
+ zSig0 = absA;\r
+ shiftCount -= 64;\r
+ }\r
+ else {\r
+ zSig1 = absA;\r
+ zSig0 = 0;\r
+ }\r
+ shortShift128Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );\r
+ return packFloat128( zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the 32-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic---which means in particular that the conversion is rounded\r
+| according to the current rounding mode. If `a' is a NaN, the largest\r
+| positive integer is returned. Otherwise, if the conversion overflows, the\r
+| largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 float32_to_int32( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig;\r
+ bits64 aSig64;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( ( aExp == 0xFF ) && aSig ) aSign = 0;\r
+ if ( aExp ) aSig |= 0x00800000;\r
+ shiftCount = 0xAF - aExp;\r
+ aSig64 = aSig;\r
+ aSig64 <<= 32;\r
+ if ( 0 < shiftCount ) shift64RightJamming( aSig64, shiftCount, &aSig64 );\r
+ return roundAndPackInt32( aSign, aSig64 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the 32-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic, except that the conversion is always rounded toward zero.\r
+| If `a' is a NaN, the largest positive integer is returned. Otherwise, if\r
+| the conversion overflows, the largest integer with the same sign as `a' is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 float32_to_int32_round_to_zero( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig;\r
+ int32 z;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ shiftCount = aExp - 0x9E;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( a != 0xCF000000 ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;\r
+ }\r
+ return (sbits32) 0x80000000;\r
+ }\r
+ else if ( aExp <= 0x7E ) {\r
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ aSig = ( aSig | 0x00800000 )<<8;\r
+ z = aSig>>( - shiftCount );\r
+ if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ if ( aSign ) z = - z;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the 64-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic---which means in particular that the conversion is rounded\r
+| according to the current rounding mode. If `a' is a NaN, the largest\r
+| positive integer is returned. Otherwise, if the conversion overflows, the\r
+| largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 float32_to_int64( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig;\r
+ bits64 aSig64, aSigExtra;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ shiftCount = 0xBE - aExp;\r
+ if ( shiftCount < 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ if ( aExp ) aSig |= 0x00800000;\r
+ aSig64 = aSig;\r
+ aSig64 <<= 40;\r
+ shift64ExtraRightJamming( aSig64, 0, shiftCount, &aSig64, &aSigExtra );\r
+ return roundAndPackInt64( aSign, aSig64, aSigExtra );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the 64-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic, except that the conversion is always rounded toward zero. If\r
+| `a' is a NaN, the largest positive integer is returned. Otherwise, if the\r
+| conversion overflows, the largest integer with the same sign as `a' is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 float32_to_int64_round_to_zero( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits32 aSig;\r
+ bits64 aSig64;\r
+ int64 z;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ shiftCount = aExp - 0xBE;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( a != 0xDF000000 ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ else if ( aExp <= 0x7E ) {\r
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ aSig64 = aSig | 0x00800000;\r
+ aSig64 <<= 40;\r
+ z = aSig64>>( - shiftCount );\r
+ if ( (bits64) ( aSig64<<( shiftCount & 63 ) ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ if ( aSign ) z = - z;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the double-precision floating-point format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float32_to_float64( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 aSig;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a ) );\r
+ return packFloat64( aSign, 0x7FF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat64( aSign, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ --aExp;\r
+ }\r
+ return packFloat64( aSign, aExp + 0x380, ( (bits64) aSig )<<29 );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the extended double-precision floating-point format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 float32_to_floatx80( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 aSig;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return commonNaNToFloatx80( float32ToCommonNaN( a ) );\r
+ return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ aSig |= 0x00800000;\r
+ return packFloatx80( aSign, aExp + 0x3F80, ( (bits64) aSig )<<40 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the single-precision floating-point value\r
+| `a' to the double-precision floating-point format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float32_to_float128( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 aSig;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return commonNaNToFloat128( float32ToCommonNaN( a ) );\r
+ return packFloat128( aSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ --aExp;\r
+ }\r
+ return packFloat128( aSign, aExp + 0x3F80, ( (bits64) aSig )<<25, 0 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Rounds the single-precision floating-point value `a' to an integer, and\r
+| returns the result as a single-precision floating-point value. The\r
+| operation is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_round_to_int( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits32 lastBitMask, roundBitsMask;\r
+ int8 roundingMode;\r
+ float32 z;\r
+\r
+ aExp = extractFloat32Exp( a );\r
+ if ( 0x96 <= aExp ) {\r
+ if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {\r
+ return propagateFloat32NaN( a, a );\r
+ }\r
+ return a;\r
+ }\r
+ if ( aExp <= 0x7E ) {\r
+ if ( (bits32) ( a<<1 ) == 0 ) return a;\r
+ float_exception_flags |= float_flag_inexact;\r
+ aSign = extractFloat32Sign( a );\r
+ switch ( float_rounding_mode ) {\r
+ case float_round_nearest_even:\r
+ if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {\r
+ return packFloat32( aSign, 0x7F, 0 );\r
+ }\r
+ break;\r
+ case float_round_down:\r
+ return aSign ? 0xBF800000 : 0;\r
+ case float_round_up:\r
+ return aSign ? 0x80000000 : 0x3F800000;\r
+ }\r
+ return packFloat32( aSign, 0, 0 );\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask <<= 0x96 - aExp;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z = a;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ z += lastBitMask>>1;\r
+ if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat32Sign( z ) ^ ( roundingMode == float_round_up ) ) {\r
+ z += roundBitsMask;\r
+ }\r
+ }\r
+ z &= ~ roundBitsMask;\r
+ if ( z != a ) float_exception_flags |= float_flag_inexact;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the absolute values of the single-precision\r
+| floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
+| before being returned. `zSign' is ignored if the result is a NaN.\r
+| The addition is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float32 addFloat32Sigs( float32 a, float32 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig;\r
+ int16 expDiff;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ expDiff = aExp - bExp;\r
+ aSig <<= 6;\r
+ bSig <<= 6;\r
+ if ( 0 < expDiff ) {\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig |= 0x20000000;\r
+ }\r
+ shift32RightJamming( bSig, expDiff, &bSig );\r
+ zExp = aExp;\r
+ }\r
+ else if ( expDiff < 0 ) {\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig |= 0x20000000;\r
+ }\r
+ shift32RightJamming( aSig, - expDiff, &aSig );\r
+ zExp = bExp;\r
+ }\r
+ else {\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig | bSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( aExp == 0 ) return packFloat32( zSign, 0, ( aSig + bSig )>>6 );\r
+ zSig = 0x40000000 + aSig + bSig;\r
+ zExp = aExp;\r
+ goto roundAndPack;\r
+ }\r
+ aSig |= 0x20000000;\r
+ zSig = ( aSig + bSig )<<1;\r
+ --zExp;\r
+ if ( (sbits32) zSig < 0 ) {\r
+ zSig = aSig + bSig;\r
+ ++zExp;\r
+ }\r
+ roundAndPack:\r
+ return roundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the absolute values of the single-\r
+| precision floating-point values `a' and `b'. If `zSign' is 1, the\r
+| difference is negated before being returned. `zSign' is ignored if the\r
+| result is a NaN. The subtraction is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float32 subFloat32Sigs( float32 a, float32 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig;\r
+ int16 expDiff;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ expDiff = aExp - bExp;\r
+ aSig <<= 7;\r
+ bSig <<= 7;\r
+ if ( 0 < expDiff ) goto aExpBigger;\r
+ if ( expDiff < 0 ) goto bExpBigger;\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig | bSig ) return propagateFloat32NaN( a, b );\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ aExp = 1;\r
+ bExp = 1;\r
+ }\r
+ if ( bSig < aSig ) goto aBigger;\r
+ if ( aSig < bSig ) goto bBigger;\r
+ return packFloat32( float_rounding_mode == float_round_down, 0, 0 );\r
+ bExpBigger:\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return packFloat32( zSign ^ 1, 0xFF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig |= 0x40000000;\r
+ }\r
+ shift32RightJamming( aSig, - expDiff, &aSig );\r
+ bSig |= 0x40000000;\r
+ bBigger:\r
+ zSig = bSig - aSig;\r
+ zExp = bExp;\r
+ zSign ^= 1;\r
+ goto normalizeRoundAndPack;\r
+ aExpBigger:\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig |= 0x40000000;\r
+ }\r
+ shift32RightJamming( bSig, expDiff, &bSig );\r
+ aSig |= 0x40000000;\r
+ aBigger:\r
+ zSig = aSig - bSig;\r
+ zExp = aExp;\r
+ normalizeRoundAndPack:\r
+ --zExp;\r
+ return normalizeRoundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the single-precision floating-point values `a'\r
+| and `b'. The operation is performed according to the IEC/IEEE Standard for\r
+| Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_add( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return addFloat32Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return subFloat32Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the single-precision floating-point values\r
+| `a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+| for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_sub( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return subFloat32Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return addFloat32Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of multiplying the single-precision floating-point values\r
+| `a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+| for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_mul( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig;\r
+ bits64 zSig64;\r
+ bits32 zSig;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ bSign = extractFloat32Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {\r
+ return propagateFloat32NaN( a, b );\r
+ }\r
+ if ( ( bExp | bSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) return packFloat32( zSign, 0, 0 );\r
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ zExp = aExp + bExp - 0x7F;\r
+ aSig = ( aSig | 0x00800000 )<<7;\r
+ bSig = ( bSig | 0x00800000 )<<8;\r
+ shift64RightJamming( ( (bits64) aSig ) * bSig, 32, &zSig64 );\r
+ zSig = zSig64;\r
+ if ( 0 <= (sbits32) ( zSig<<1 ) ) {\r
+ zSig <<= 1;\r
+ --zExp;\r
+ }\r
+ return roundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of dividing the single-precision floating-point value `a'\r
+| by the corresponding value `b'. The operation is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_div( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits32 aSig, bSig, zSig;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ bSign = extractFloat32Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, b );\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return packFloat32( zSign, 0, 0 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ float_raise( float_flag_divbyzero );\r
+ return packFloat32( zSign, 0xFF, 0 );\r
+ }\r
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = aExp - bExp + 0x7D;\r
+ aSig = ( aSig | 0x00800000 )<<7;\r
+ bSig = ( bSig | 0x00800000 )<<8;\r
+ if ( bSig <= ( aSig + aSig ) ) {\r
+ aSig >>= 1;\r
+ ++zExp;\r
+ }\r
+ zSig = ( ( (bits64) aSig )<<32 ) / bSig;\r
+ if ( ( zSig & 0x3F ) == 0 ) {\r
+ zSig |= ( (bits64) bSig * zSig != ( (bits64) aSig )<<32 );\r
+ }\r
+ return roundAndPackFloat32( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the remainder of the single-precision floating-point value `a'\r
+| with respect to the corresponding value `b'. The operation is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_rem( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, expDiff;\r
+ bits32 aSig, bSig;\r
+ bits32 q;\r
+ bits64 aSig64, bSig64, q64;\r
+ bits32 alternateASig;\r
+ sbits32 sigMean;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ bSig = extractFloat32Frac( b );\r
+ bExp = extractFloat32Exp( b );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {\r
+ return propagateFloat32NaN( a, b );\r
+ }\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( bExp == 0xFF ) {\r
+ if ( bSig ) return propagateFloat32NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return a;\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ expDiff = aExp - bExp;\r
+ aSig |= 0x00800000;\r
+ bSig |= 0x00800000;\r
+ if ( expDiff < 32 ) {\r
+ aSig <<= 8;\r
+ bSig <<= 8;\r
+ if ( expDiff < 0 ) {\r
+ if ( expDiff < -1 ) return a;\r
+ aSig >>= 1;\r
+ }\r
+ q = ( bSig <= aSig );\r
+ if ( q ) aSig -= bSig;\r
+ if ( 0 < expDiff ) {\r
+ q = ( ( (bits64) aSig )<<32 ) / bSig;\r
+ q >>= 32 - expDiff;\r
+ bSig >>= 2;\r
+ aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;\r
+ }\r
+ else {\r
+ aSig >>= 2;\r
+ bSig >>= 2;\r
+ }\r
+ }\r
+ else {\r
+ if ( bSig <= aSig ) aSig -= bSig;\r
+ aSig64 = ( (bits64) aSig )<<40;\r
+ bSig64 = ( (bits64) bSig )<<40;\r
+ expDiff -= 64;\r
+ while ( 0 < expDiff ) {\r
+ q64 = estimateDiv128To64( aSig64, 0, bSig64 );\r
+ q64 = ( 2 < q64 ) ? q64 - 2 : 0;\r
+ aSig64 = - ( ( bSig * q64 )<<38 );\r
+ expDiff -= 62;\r
+ }\r
+ expDiff += 64;\r
+ q64 = estimateDiv128To64( aSig64, 0, bSig64 );\r
+ q64 = ( 2 < q64 ) ? q64 - 2 : 0;\r
+ q = q64>>( 64 - expDiff );\r
+ bSig <<= 6;\r
+ aSig = ( ( aSig64>>33 )<<( expDiff - 1 ) ) - bSig * q;\r
+ }\r
+ do {\r
+ alternateASig = aSig;\r
+ ++q;\r
+ aSig -= bSig;\r
+ } while ( 0 <= (sbits32) aSig );\r
+ sigMean = aSig + alternateASig;\r
+ if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {\r
+ aSig = alternateASig;\r
+ }\r
+ zSign = ( (sbits32) aSig < 0 );\r
+ if ( zSign ) aSig = - aSig;\r
+ return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the square root of the single-precision floating-point value `a'.\r
+| The operation is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float32_sqrt( float32 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, zExp;\r
+ bits32 aSig, zSig;\r
+ bits64 rem, term;\r
+\r
+ aSig = extractFloat32Frac( a );\r
+ aExp = extractFloat32Exp( a );\r
+ aSign = extractFloat32Sign( a );\r
+ if ( aExp == 0xFF ) {\r
+ if ( aSig ) return propagateFloat32NaN( a, 0 );\r
+ if ( ! aSign ) return a;\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( aSign ) {\r
+ if ( ( aExp | aSig ) == 0 ) return a;\r
+ float_raise( float_flag_invalid );\r
+ return float32_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return 0;\r
+ normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = ( ( aExp - 0x7F )>>1 ) + 0x7E;\r
+ aSig = ( aSig | 0x00800000 )<<8;\r
+ zSig = estimateSqrt32( aExp, aSig ) + 2;\r
+ if ( ( zSig & 0x7F ) <= 5 ) {\r
+ if ( zSig < 2 ) {\r
+ zSig = 0x7FFFFFFF;\r
+ goto roundAndPack;\r
+ }\r
+ aSig >>= aExp & 1;\r
+ term = ( (bits64) zSig ) * zSig;\r
+ rem = ( ( (bits64) aSig )<<32 ) - term;\r
+ while ( (sbits64) rem < 0 ) {\r
+ --zSig;\r
+ rem += ( ( (bits64) zSig )<<1 ) | 1;\r
+ }\r
+ zSig |= ( rem != 0 );\r
+ }\r
+ shift32RightJamming( zSig, 1, &zSig );\r
+ roundAndPack:\r
+ return roundAndPackFloat32( 0, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the single-precision floating-point value `a' is equal to\r
+| the corresponding value `b', and 0 otherwise. The comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float32_eq( float32 a, float32 b )\r
+{\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the single-precision floating-point value `a' is less than\r
+| or equal to the corresponding value `b', and 0 otherwise. The comparison\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float32_le( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the single-precision floating-point value `a' is less than\r
+| the corresponding value `b', and 0 otherwise. The comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float32_lt( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the single-precision floating-point value `a' is equal to\r
+| the corresponding value `b', and 0 otherwise. The invalid exception is\r
+| raised if either operand is a NaN. Otherwise, the comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float32_eq_signaling( float32 a, float32 b )\r
+{\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the single-precision floating-point value `a' is less than or\r
+| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not\r
+| cause an exception. Otherwise, the comparison is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float32_le_quiet( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+ int16 aExp, bExp;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the single-precision floating-point value `a' is less than\r
+| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an\r
+| exception. Otherwise, the comparison is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float32_lt_quiet( float32 a, float32 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
+ || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
+ ) {\r
+ if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat32Sign( a );\r
+ bSign = extractFloat32Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the 32-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic---which means in particular that the conversion is rounded\r
+| according to the current rounding mode. If `a' is a NaN, the largest\r
+| positive integer is returned. Otherwise, if the conversion overflows, the\r
+| largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 float64_to_int32( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits64 aSig;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;\r
+ if ( aExp ) aSig |= LIT64( 0x0010000000000000 );\r
+ shiftCount = 0x42C - aExp;\r
+ if ( 0 < shiftCount ) shift64RightJamming( aSig, shiftCount, &aSig );\r
+ return roundAndPackInt32( aSign, aSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the 32-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic, except that the conversion is always rounded toward zero.\r
+| If `a' is a NaN, the largest positive integer is returned. Otherwise, if\r
+| the conversion overflows, the largest integer with the same sign as `a' is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 float64_to_int32_round_to_zero( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits64 aSig, savedASig;\r
+ int32 z;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( 0x41E < aExp ) {\r
+ if ( ( aExp == 0x7FF ) && aSig ) aSign = 0;\r
+ goto invalid;\r
+ }\r
+ else if ( aExp < 0x3FF ) {\r
+ if ( aExp || aSig ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ aSig |= LIT64( 0x0010000000000000 );\r
+ shiftCount = 0x433 - aExp;\r
+ savedASig = aSig;\r
+ aSig >>= shiftCount;\r
+ z = aSig;\r
+ if ( aSign ) z = - z;\r
+ if ( ( z < 0 ) ^ aSign ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
+ }\r
+ if ( ( aSig<<shiftCount ) != savedASig ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the 64-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic---which means in particular that the conversion is rounded\r
+| according to the current rounding mode. If `a' is a NaN, the largest\r
+| positive integer is returned. Otherwise, if the conversion overflows, the\r
+| largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 float64_to_int64( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits64 aSig, aSigExtra;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp ) aSig |= LIT64( 0x0010000000000000 );\r
+ shiftCount = 0x433 - aExp;\r
+ if ( shiftCount <= 0 ) {\r
+ if ( 0x43E < aExp ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign\r
+ || ( ( aExp == 0x7FF )\r
+ && ( aSig != LIT64( 0x0010000000000000 ) ) )\r
+ ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ aSigExtra = 0;\r
+ aSig <<= - shiftCount;\r
+ }\r
+ else {\r
+ shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );\r
+ }\r
+ return roundAndPackInt64( aSign, aSig, aSigExtra );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the 64-bit two's complement integer format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic, except that the conversion is always rounded toward zero.\r
+| If `a' is a NaN, the largest positive integer is returned. Otherwise, if\r
+| the conversion overflows, the largest integer with the same sign as `a' is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 float64_to_int64_round_to_zero( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, shiftCount;\r
+ bits64 aSig;\r
+ int64 z;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp ) aSig |= LIT64( 0x0010000000000000 );\r
+ shiftCount = aExp - 0x433;\r
+ if ( 0 <= shiftCount ) {\r
+ if ( 0x43E <= aExp ) {\r
+ if ( a != LIT64( 0xC3E0000000000000 ) ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign\r
+ || ( ( aExp == 0x7FF )\r
+ && ( aSig != LIT64( 0x0010000000000000 ) ) )\r
+ ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ z = aSig<<shiftCount;\r
+ }\r
+ else {\r
+ if ( aExp < 0x3FE ) {\r
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ z = aSig>>( - shiftCount );\r
+ if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ }\r
+ if ( aSign ) z = - z;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the single-precision floating-point format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float64_to_float32( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits64 aSig;\r
+ bits32 zSig;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return commonNaNToFloat32( float64ToCommonNaN( a ) );\r
+ return packFloat32( aSign, 0xFF, 0 );\r
+ }\r
+ shift64RightJamming( aSig, 22, &aSig );\r
+ zSig = aSig;\r
+ if ( aExp || zSig ) {\r
+ zSig |= 0x40000000;\r
+ aExp -= 0x381;\r
+ }\r
+ return roundAndPackFloat32( aSign, aExp, zSig );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the extended double-precision floating-point format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 float64_to_floatx80( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits64 aSig;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return commonNaNToFloatx80( float64ToCommonNaN( a ) );\r
+ return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloatx80( aSign, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ return\r
+ packFloatx80(\r
+ aSign, aExp + 0x3C00, ( aSig | LIT64( 0x0010000000000000 ) )<<11 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the double-precision floating-point value\r
+| `a' to the quadruple-precision floating-point format. The conversion is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float64_to_float128( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits64 aSig, zSig0, zSig1;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return commonNaNToFloat128( float64ToCommonNaN( a ) );\r
+ return packFloat128( aSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat128( aSign, 0, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );\r
+ --aExp;\r
+ }\r
+ shift128Right( aSig, 0, 4, &zSig0, &zSig1 );\r
+ return packFloat128( aSign, aExp + 0x3C00, zSig0, zSig1 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Rounds the double-precision floating-point value `a' to an integer, and\r
+| returns the result as a double-precision floating-point value. The\r
+| operation is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_round_to_int( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits64 lastBitMask, roundBitsMask;\r
+ int8 roundingMode;\r
+ float64 z;\r
+\r
+ aExp = extractFloat64Exp( a );\r
+ if ( 0x433 <= aExp ) {\r
+ if ( ( aExp == 0x7FF ) && extractFloat64Frac( a ) ) {\r
+ return propagateFloat64NaN( a, a );\r
+ }\r
+ return a;\r
+ }\r
+ if ( aExp < 0x3FF ) {\r
+ if ( (bits64) ( a<<1 ) == 0 ) return a;\r
+ float_exception_flags |= float_flag_inexact;\r
+ aSign = extractFloat64Sign( a );\r
+ switch ( float_rounding_mode ) {\r
+ case float_round_nearest_even:\r
+ if ( ( aExp == 0x3FE ) && extractFloat64Frac( a ) ) {\r
+ return packFloat64( aSign, 0x3FF, 0 );\r
+ }\r
+ break;\r
+ case float_round_down:\r
+ return aSign ? LIT64( 0xBFF0000000000000 ) : 0;\r
+ case float_round_up:\r
+ return\r
+ aSign ? LIT64( 0x8000000000000000 ) : LIT64( 0x3FF0000000000000 );\r
+ }\r
+ return packFloat64( aSign, 0, 0 );\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask <<= 0x433 - aExp;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z = a;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ z += lastBitMask>>1;\r
+ if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat64Sign( z ) ^ ( roundingMode == float_round_up ) ) {\r
+ z += roundBitsMask;\r
+ }\r
+ }\r
+ z &= ~ roundBitsMask;\r
+ if ( z != a ) float_exception_flags |= float_flag_inexact;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the absolute values of the double-precision\r
+| floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
+| before being returned. `zSign' is ignored if the result is a NaN.\r
+| The addition is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float64 addFloat64Sigs( float64 a, float64 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig;\r
+ int16 expDiff;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ bSig = extractFloat64Frac( b );\r
+ bExp = extractFloat64Exp( b );\r
+ expDiff = aExp - bExp;\r
+ aSig <<= 9;\r
+ bSig <<= 9;\r
+ if ( 0 < expDiff ) {\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig |= LIT64( 0x2000000000000000 );\r
+ }\r
+ shift64RightJamming( bSig, expDiff, &bSig );\r
+ zExp = aExp;\r
+ }\r
+ else if ( expDiff < 0 ) {\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig ) return propagateFloat64NaN( a, b );\r
+ return packFloat64( zSign, 0x7FF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig |= LIT64( 0x2000000000000000 );\r
+ }\r
+ shift64RightJamming( aSig, - expDiff, &aSig );\r
+ zExp = bExp;\r
+ }\r
+ else {\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig | bSig ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( aExp == 0 ) return packFloat64( zSign, 0, ( aSig + bSig )>>9 );\r
+ zSig = LIT64( 0x4000000000000000 ) + aSig + bSig;\r
+ zExp = aExp;\r
+ goto roundAndPack;\r
+ }\r
+ aSig |= LIT64( 0x2000000000000000 );\r
+ zSig = ( aSig + bSig )<<1;\r
+ --zExp;\r
+ if ( (sbits64) zSig < 0 ) {\r
+ zSig = aSig + bSig;\r
+ ++zExp;\r
+ }\r
+ roundAndPack:\r
+ return roundAndPackFloat64( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the absolute values of the double-\r
+| precision floating-point values `a' and `b'. If `zSign' is 1, the\r
+| difference is negated before being returned. `zSign' is ignored if the\r
+| result is a NaN. The subtraction is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float64 subFloat64Sigs( float64 a, float64 b, flag zSign )\r
+{\r
+ int16 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig;\r
+ int16 expDiff;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ bSig = extractFloat64Frac( b );\r
+ bExp = extractFloat64Exp( b );\r
+ expDiff = aExp - bExp;\r
+ aSig <<= 10;\r
+ bSig <<= 10;\r
+ if ( 0 < expDiff ) goto aExpBigger;\r
+ if ( expDiff < 0 ) goto bExpBigger;\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig | bSig ) return propagateFloat64NaN( a, b );\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ aExp = 1;\r
+ bExp = 1;\r
+ }\r
+ if ( bSig < aSig ) goto aBigger;\r
+ if ( aSig < bSig ) goto bBigger;\r
+ return packFloat64( float_rounding_mode == float_round_down, 0, 0 );\r
+ bExpBigger:\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig ) return propagateFloat64NaN( a, b );\r
+ return packFloat64( zSign ^ 1, 0x7FF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig |= LIT64( 0x4000000000000000 );\r
+ }\r
+ shift64RightJamming( aSig, - expDiff, &aSig );\r
+ bSig |= LIT64( 0x4000000000000000 );\r
+ bBigger:\r
+ zSig = bSig - aSig;\r
+ zExp = bExp;\r
+ zSign ^= 1;\r
+ goto normalizeRoundAndPack;\r
+ aExpBigger:\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig |= LIT64( 0x4000000000000000 );\r
+ }\r
+ shift64RightJamming( bSig, expDiff, &bSig );\r
+ aSig |= LIT64( 0x4000000000000000 );\r
+ aBigger:\r
+ zSig = aSig - bSig;\r
+ zExp = aExp;\r
+ normalizeRoundAndPack:\r
+ --zExp;\r
+ return normalizeRoundAndPackFloat64( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the double-precision floating-point values `a'\r
+| and `b'. The operation is performed according to the IEC/IEEE Standard for\r
+| Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_add( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return addFloat64Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return subFloat64Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the double-precision floating-point values\r
+| `a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+| for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_sub( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return subFloat64Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return addFloat64Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of multiplying the double-precision floating-point values\r
+| `a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+| for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_mul( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig0, zSig1;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ bSig = extractFloat64Frac( b );\r
+ bExp = extractFloat64Exp( b );\r
+ bSign = extractFloat64Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {\r
+ return propagateFloat64NaN( a, b );\r
+ }\r
+ if ( ( bExp | bSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ return packFloat64( zSign, 0x7FF, 0 );\r
+ }\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig ) return propagateFloat64NaN( a, b );\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ return packFloat64( zSign, 0x7FF, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) return packFloat64( zSign, 0, 0 );\r
+ normalizeFloat64Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ zExp = aExp + bExp - 0x3FF;\r
+ aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;\r
+ bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;\r
+ mul64To128( aSig, bSig, &zSig0, &zSig1 );\r
+ zSig0 |= ( zSig1 != 0 );\r
+ if ( 0 <= (sbits64) ( zSig0<<1 ) ) {\r
+ zSig0 <<= 1;\r
+ --zExp;\r
+ }\r
+ return roundAndPackFloat64( zSign, zExp, zSig0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of dividing the double-precision floating-point value `a'\r
+| by the corresponding value `b'. The operation is performed according to\r
+| the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_div( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig;\r
+ bits64 rem0, rem1;\r
+ bits64 term0, term1;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ bSig = extractFloat64Frac( b );\r
+ bExp = extractFloat64Exp( b );\r
+ bSign = extractFloat64Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return propagateFloat64NaN( a, b );\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig ) return propagateFloat64NaN( a, b );\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ return packFloat64( zSign, 0x7FF, 0 );\r
+ }\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig ) return propagateFloat64NaN( a, b );\r
+ return packFloat64( zSign, 0, 0 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ float_raise( float_flag_divbyzero );\r
+ return packFloat64( zSign, 0x7FF, 0 );\r
+ }\r
+ normalizeFloat64Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloat64( zSign, 0, 0 );\r
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = aExp - bExp + 0x3FD;\r
+ aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<10;\r
+ bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;\r
+ if ( bSig <= ( aSig + aSig ) ) {\r
+ aSig >>= 1;\r
+ ++zExp;\r
+ }\r
+ zSig = estimateDiv128To64( aSig, 0, bSig );\r
+ if ( ( zSig & 0x1FF ) <= 2 ) {\r
+ mul64To128( bSig, zSig, &term0, &term1 );\r
+ sub128( aSig, 0, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits64) rem0 < 0 ) {\r
+ --zSig;\r
+ add128( rem0, rem1, 0, bSig, &rem0, &rem1 );\r
+ }\r
+ zSig |= ( rem1 != 0 );\r
+ }\r
+ return roundAndPackFloat64( zSign, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the remainder of the double-precision floating-point value `a'\r
+| with respect to the corresponding value `b'. The operation is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_rem( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int16 aExp, bExp, expDiff;\r
+ bits64 aSig, bSig;\r
+ bits64 q, alternateASig;\r
+ sbits64 sigMean;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ bSig = extractFloat64Frac( b );\r
+ bExp = extractFloat64Exp( b );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig || ( ( bExp == 0x7FF ) && bSig ) ) {\r
+ return propagateFloat64NaN( a, b );\r
+ }\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ if ( bExp == 0x7FF ) {\r
+ if ( bSig ) return propagateFloat64NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ normalizeFloat64Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return a;\r
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ expDiff = aExp - bExp;\r
+ aSig = ( aSig | LIT64( 0x0010000000000000 ) )<<11;\r
+ bSig = ( bSig | LIT64( 0x0010000000000000 ) )<<11;\r
+ if ( expDiff < 0 ) {\r
+ if ( expDiff < -1 ) return a;\r
+ aSig >>= 1;\r
+ }\r
+ q = ( bSig <= aSig );\r
+ if ( q ) aSig -= bSig;\r
+ expDiff -= 64;\r
+ while ( 0 < expDiff ) {\r
+ q = estimateDiv128To64( aSig, 0, bSig );\r
+ q = ( 2 < q ) ? q - 2 : 0;\r
+ aSig = - ( ( bSig>>2 ) * q );\r
+ expDiff -= 62;\r
+ }\r
+ expDiff += 64;\r
+ if ( 0 < expDiff ) {\r
+ q = estimateDiv128To64( aSig, 0, bSig );\r
+ q = ( 2 < q ) ? q - 2 : 0;\r
+ q >>= 64 - expDiff;\r
+ bSig >>= 2;\r
+ aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;\r
+ }\r
+ else {\r
+ aSig >>= 2;\r
+ bSig >>= 2;\r
+ }\r
+ do {\r
+ alternateASig = aSig;\r
+ ++q;\r
+ aSig -= bSig;\r
+ } while ( 0 <= (sbits64) aSig );\r
+ sigMean = aSig + alternateASig;\r
+ if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {\r
+ aSig = alternateASig;\r
+ }\r
+ zSign = ( (sbits64) aSig < 0 );\r
+ if ( zSign ) aSig = - aSig;\r
+ return normalizeRoundAndPackFloat64( aSign ^ zSign, bExp, aSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the square root of the double-precision floating-point value `a'.\r
+| The operation is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float64_sqrt( float64 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp, zExp;\r
+ bits64 aSig, zSig, doubleZSig;\r
+ bits64 rem0, rem1, term0, term1;\r
+ float64 z;\r
+\r
+ aSig = extractFloat64Frac( a );\r
+ aExp = extractFloat64Exp( a );\r
+ aSign = extractFloat64Sign( a );\r
+ if ( aExp == 0x7FF ) {\r
+ if ( aSig ) return propagateFloat64NaN( a, a );\r
+ if ( ! aSign ) return a;\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ if ( aSign ) {\r
+ if ( ( aExp | aSig ) == 0 ) return a;\r
+ float_raise( float_flag_invalid );\r
+ return float64_default_nan;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return 0;\r
+ normalizeFloat64Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;\r
+ aSig |= LIT64( 0x0010000000000000 );\r
+ zSig = estimateSqrt32( aExp, aSig>>21 );\r
+ aSig <<= 9 - ( aExp & 1 );\r
+ zSig = estimateDiv128To64( aSig, 0, zSig<<32 ) + ( zSig<<30 );\r
+ if ( ( zSig & 0x1FF ) <= 5 ) {\r
+ doubleZSig = zSig<<1;\r
+ mul64To128( zSig, zSig, &term0, &term1 );\r
+ sub128( aSig, 0, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits64) rem0 < 0 ) {\r
+ --zSig;\r
+ doubleZSig -= 2;\r
+ add128( rem0, rem1, zSig>>63, doubleZSig | 1, &rem0, &rem1 );\r
+ }\r
+ zSig |= ( ( rem0 | rem1 ) != 0 );\r
+ }\r
+ return roundAndPackFloat64( 0, zExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the double-precision floating-point value `a' is equal to the\r
+| corresponding value `b', and 0 otherwise. The comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float64_eq( float64 a, float64 b )\r
+{\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )\r
+ ) {\r
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the double-precision floating-point value `a' is less than or\r
+| equal to the corresponding value `b', and 0 otherwise. The comparison is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float64_le( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the double-precision floating-point value `a' is less than\r
+| the corresponding value `b', and 0 otherwise. The comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float64_lt( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the double-precision floating-point value `a' is equal to the\r
+| corresponding value `b', and 0 otherwise. The invalid exception is raised\r
+| if either operand is a NaN. Otherwise, the comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float64_eq_signaling( float64 a, float64 b )\r
+{\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ return ( a == b ) || ( (bits64) ( ( a | b )<<1 ) == 0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the double-precision floating-point value `a' is less than or\r
+| equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not\r
+| cause an exception. Otherwise, the comparison is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float64_le_quiet( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+ int16 aExp, bExp;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )\r
+ ) {\r
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign ) return aSign || ( (bits64) ( ( a | b )<<1 ) == 0 );\r
+ return ( a == b ) || ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the double-precision floating-point value `a' is less than\r
+| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an\r
+| exception. Otherwise, the comparison is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float64_lt_quiet( float64 a, float64 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat64Exp( a ) == 0x7FF ) && extractFloat64Frac( a ) )\r
+ || ( ( extractFloat64Exp( b ) == 0x7FF ) && extractFloat64Frac( b ) )\r
+ ) {\r
+ if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat64Sign( a );\r
+ bSign = extractFloat64Sign( b );\r
+ if ( aSign != bSign ) return aSign && ( (bits64) ( ( a | b )<<1 ) != 0 );\r
+ return ( a != b ) && ( aSign ^ ( a < b ) );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the 32-bit two's complement integer format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic---which means in particular that the conversion\r
+| is rounded according to the current rounding mode. If `a' is a NaN, the\r
+| largest positive integer is returned. Otherwise, if the conversion\r
+| overflows, the largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 floatx80_to_int32( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;\r
+ shiftCount = 0x4037 - aExp;\r
+ if ( shiftCount <= 0 ) shiftCount = 1;\r
+ shift64RightJamming( aSig, shiftCount, &aSig );\r
+ return roundAndPackInt32( aSign, aSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the 32-bit two's complement integer format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic, except that the conversion is always rounded\r
+| toward zero. If `a' is a NaN, the largest positive integer is returned.\r
+| Otherwise, if the conversion overflows, the largest integer with the same\r
+| sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 floatx80_to_int32_round_to_zero( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig, savedASig;\r
+ int32 z;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ if ( 0x401E < aExp ) {\r
+ if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) aSign = 0;\r
+ goto invalid;\r
+ }\r
+ else if ( aExp < 0x3FFF ) {\r
+ if ( aExp || aSig ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ shiftCount = 0x403E - aExp;\r
+ savedASig = aSig;\r
+ aSig >>= shiftCount;\r
+ z = aSig;\r
+ if ( aSign ) z = - z;\r
+ if ( ( z < 0 ) ^ aSign ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
+ }\r
+ if ( ( aSig<<shiftCount ) != savedASig ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the 64-bit two's complement integer format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic---which means in particular that the conversion\r
+| is rounded according to the current rounding mode. If `a' is a NaN,\r
+| the largest positive integer is returned. Otherwise, if the conversion\r
+| overflows, the largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 floatx80_to_int64( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig, aSigExtra;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ shiftCount = 0x403E - aExp;\r
+ if ( shiftCount <= 0 ) {\r
+ if ( shiftCount ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign\r
+ || ( ( aExp == 0x7FFF )\r
+ && ( aSig != LIT64( 0x8000000000000000 ) ) )\r
+ ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ aSigExtra = 0;\r
+ }\r
+ else {\r
+ shift64ExtraRightJamming( aSig, 0, shiftCount, &aSig, &aSigExtra );\r
+ }\r
+ return roundAndPackInt64( aSign, aSig, aSigExtra );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the 64-bit two's complement integer format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic, except that the conversion is always rounded\r
+| toward zero. If `a' is a NaN, the largest positive integer is returned.\r
+| Otherwise, if the conversion overflows, the largest integer with the same\r
+| sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 floatx80_to_int64_round_to_zero( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig;\r
+ int64 z;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ shiftCount = aExp - 0x403E;\r
+ if ( 0 <= shiftCount ) {\r
+ aSig &= LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ if ( ( a.high != 0xC03E ) || aSig ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0x7FFF ) && aSig ) ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ else if ( aExp < 0x3FFF ) {\r
+ if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ z = aSig>>( - shiftCount );\r
+ if ( (bits64) ( aSig<<( shiftCount & 63 ) ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ if ( aSign ) z = - z;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the single-precision floating-point format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 floatx80_to_float32( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 aSig;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig<<1 ) ) {\r
+ return commonNaNToFloat32( floatx80ToCommonNaN( a ) );\r
+ }\r
+ return packFloat32( aSign, 0xFF, 0 );\r
+ }\r
+ shift64RightJamming( aSig, 33, &aSig );\r
+ if ( aExp || aSig ) aExp -= 0x3F81;\r
+ return roundAndPackFloat32( aSign, aExp, aSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the double-precision floating-point format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 floatx80_to_float64( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 aSig, zSig;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig<<1 ) ) {\r
+ return commonNaNToFloat64( floatx80ToCommonNaN( a ) );\r
+ }\r
+ return packFloat64( aSign, 0x7FF, 0 );\r
+ }\r
+ shift64RightJamming( aSig, 1, &zSig );\r
+ if ( aExp || aSig ) aExp -= 0x3C01;\r
+ return roundAndPackFloat64( aSign, aExp, zSig );\r
+\r
+}\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the extended double-precision floating-\r
+| point value `a' to the quadruple-precision floating-point format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 floatx80_to_float128( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int16 aExp;\r
+ bits64 aSig, zSig0, zSig1;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ if ( ( aExp == 0x7FFF ) && (bits64) ( aSig<<1 ) ) {\r
+ return commonNaNToFloat128( floatx80ToCommonNaN( a ) );\r
+ }\r
+ shift128Right( aSig<<1, 0, 16, &zSig0, &zSig1 );\r
+ return packFloat128( aSign, aExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Rounds the extended double-precision floating-point value `a' to an integer,\r
+| and returns the result as an extended quadruple-precision floating-point\r
+| value. The operation is performed according to the IEC/IEEE Standard for\r
+| Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_round_to_int( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 lastBitMask, roundBitsMask;\r
+ int8 roundingMode;\r
+ floatx80 z;\r
+\r
+ aExp = extractFloatx80Exp( a );\r
+ if ( 0x403E <= aExp ) {\r
+ if ( ( aExp == 0x7FFF ) && (bits64) ( extractFloatx80Frac( a )<<1 ) ) {\r
+ return propagateFloatx80NaN( a, a );\r
+ }\r
+ return a;\r
+ }\r
+ if ( aExp < 0x3FFF ) {\r
+ if ( ( aExp == 0 )\r
+ && ( (bits64) ( extractFloatx80Frac( a )<<1 ) == 0 ) ) {\r
+ return a;\r
+ }\r
+ float_exception_flags |= float_flag_inexact;\r
+ aSign = extractFloatx80Sign( a );\r
+ switch ( float_rounding_mode ) {\r
+ case float_round_nearest_even:\r
+ if ( ( aExp == 0x3FFE ) && (bits64) ( extractFloatx80Frac( a )<<1 )\r
+ ) {\r
+ return\r
+ packFloatx80( aSign, 0x3FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ break;\r
+ case float_round_down:\r
+ return\r
+ aSign ?\r
+ packFloatx80( 1, 0x3FFF, LIT64( 0x8000000000000000 ) )\r
+ : packFloatx80( 0, 0, 0 );\r
+ case float_round_up:\r
+ return\r
+ aSign ? packFloatx80( 1, 0, 0 )\r
+ : packFloatx80( 0, 0x3FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ return packFloatx80( aSign, 0, 0 );\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask <<= 0x403E - aExp;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z = a;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ z.low += lastBitMask>>1;\r
+ if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloatx80Sign( z ) ^ ( roundingMode == float_round_up ) ) {\r
+ z.low += roundBitsMask;\r
+ }\r
+ }\r
+ z.low &= ~ roundBitsMask;\r
+ if ( z.low == 0 ) {\r
+ ++z.high;\r
+ z.low = LIT64( 0x8000000000000000 );\r
+ }\r
+ if ( z.low != a.low ) float_exception_flags |= float_flag_inexact;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the absolute values of the extended double-\r
+| precision floating-point values `a' and `b'. If `zSign' is 1, the sum is\r
+| negated before being returned. `zSign' is ignored if the result is a NaN.\r
+| The addition is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static floatx80 addFloatx80Sigs( floatx80 a, floatx80 b, flag zSign )\r
+{\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig0, zSig1;\r
+ int32 expDiff;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ bSig = extractFloatx80Frac( b );\r
+ bExp = extractFloatx80Exp( b );\r
+ expDiff = aExp - bExp;\r
+ if ( 0 < expDiff ) {\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) --expDiff;\r
+ shift64ExtraRightJamming( bSig, 0, expDiff, &bSig, &zSig1 );\r
+ zExp = aExp;\r
+ }\r
+ else if ( expDiff < 0 ) {\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( aExp == 0 ) ++expDiff;\r
+ shift64ExtraRightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );\r
+ zExp = bExp;\r
+ }\r
+ else {\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( ( aSig | bSig )<<1 ) ) {\r
+ return propagateFloatx80NaN( a, b );\r
+ }\r
+ return a;\r
+ }\r
+ zSig1 = 0;\r
+ zSig0 = aSig + bSig;\r
+ if ( aExp == 0 ) {\r
+ normalizeFloatx80Subnormal( zSig0, &zExp, &zSig0 );\r
+ goto roundAndPack;\r
+ }\r
+ zExp = aExp;\r
+ goto shiftRight1;\r
+ }\r
+ zSig0 = aSig + bSig;\r
+ if ( (sbits64) zSig0 < 0 ) goto roundAndPack;\r
+ shiftRight1:\r
+ shift64ExtraRightJamming( zSig0, zSig1, 1, &zSig0, &zSig1 );\r
+ zSig0 |= LIT64( 0x8000000000000000 );\r
+ ++zExp;\r
+ roundAndPack:\r
+ return\r
+ roundAndPackFloatx80(\r
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the absolute values of the extended\r
+| double-precision floating-point values `a' and `b'. If `zSign' is 1, the\r
+| difference is negated before being returned. `zSign' is ignored if the\r
+| result is a NaN. The subtraction is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static floatx80 subFloatx80Sigs( floatx80 a, floatx80 b, flag zSign )\r
+{\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig0, zSig1;\r
+ int32 expDiff;\r
+ floatx80 z;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ bSig = extractFloatx80Frac( b );\r
+ bExp = extractFloatx80Exp( b );\r
+ expDiff = aExp - bExp;\r
+ if ( 0 < expDiff ) goto aExpBigger;\r
+ if ( expDiff < 0 ) goto bExpBigger;\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( ( aSig | bSig )<<1 ) ) {\r
+ return propagateFloatx80NaN( a, b );\r
+ }\r
+ float_raise( float_flag_invalid );\r
+ z.low = floatx80_default_nan_low;\r
+ z.high = floatx80_default_nan_high;\r
+ return z;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ aExp = 1;\r
+ bExp = 1;\r
+ }\r
+ zSig1 = 0;\r
+ if ( bSig < aSig ) goto aBigger;\r
+ if ( aSig < bSig ) goto bBigger;\r
+ return packFloatx80( float_rounding_mode == float_round_down, 0, 0 );\r
+ bExpBigger:\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ return packFloatx80( zSign ^ 1, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( aExp == 0 ) ++expDiff;\r
+ shift128RightJamming( aSig, 0, - expDiff, &aSig, &zSig1 );\r
+ bBigger:\r
+ sub128( bSig, 0, aSig, zSig1, &zSig0, &zSig1 );\r
+ zExp = bExp;\r
+ zSign ^= 1;\r
+ goto normalizeRoundAndPack;\r
+ aExpBigger:\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) --expDiff;\r
+ shift128RightJamming( bSig, 0, expDiff, &bSig, &zSig1 );\r
+ aBigger:\r
+ sub128( aSig, 0, bSig, zSig1, &zSig0, &zSig1 );\r
+ zExp = aExp;\r
+ normalizeRoundAndPack:\r
+ return\r
+ normalizeRoundAndPackFloatx80(\r
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the extended double-precision floating-point\r
+| values `a' and `b'. The operation is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_add( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloatx80Sign( a );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return addFloatx80Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return subFloatx80Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the extended double-precision floating-\r
+| point values `a' and `b'. The operation is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_sub( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloatx80Sign( a );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return subFloatx80Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return addFloatx80Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of multiplying the extended double-precision floating-\r
+| point values `a' and `b'. The operation is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_mul( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig0, zSig1;\r
+ floatx80 z;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ bSig = extractFloatx80Frac( b );\r
+ bExp = extractFloatx80Exp( b );\r
+ bSign = extractFloatx80Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig<<1 )\r
+ || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {\r
+ return propagateFloatx80NaN( a, b );\r
+ }\r
+ if ( ( bExp | bSig ) == 0 ) goto invalid;\r
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = floatx80_default_nan_low;\r
+ z.high = floatx80_default_nan_high;\r
+ return z;\r
+ }\r
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );\r
+ normalizeFloatx80Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) return packFloatx80( zSign, 0, 0 );\r
+ normalizeFloatx80Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ zExp = aExp + bExp - 0x3FFE;\r
+ mul64To128( aSig, bSig, &zSig0, &zSig1 );\r
+ if ( 0 < (sbits64) zSig0 ) {\r
+ shortShift128Left( zSig0, zSig1, 1, &zSig0, &zSig1 );\r
+ --zExp;\r
+ }\r
+ return\r
+ roundAndPackFloatx80(\r
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of dividing the extended double-precision floating-point\r
+| value `a' by the corresponding value `b'. The operation is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_div( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig, bSig, zSig0, zSig1;\r
+ bits64 rem0, rem1, rem2, term0, term1, term2;\r
+ floatx80 z;\r
+\r
+ aSig = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ bSig = extractFloatx80Frac( b );\r
+ bExp = extractFloatx80Exp( b );\r
+ bSign = extractFloatx80Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ goto invalid;\r
+ }\r
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ return packFloatx80( zSign, 0, 0 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ if ( ( aExp | aSig ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = floatx80_default_nan_low;\r
+ z.high = floatx80_default_nan_high;\r
+ return z;\r
+ }\r
+ float_raise( float_flag_divbyzero );\r
+ return packFloatx80( zSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ normalizeFloatx80Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig == 0 ) return packFloatx80( zSign, 0, 0 );\r
+ normalizeFloatx80Subnormal( aSig, &aExp, &aSig );\r
+ }\r
+ zExp = aExp - bExp + 0x3FFE;\r
+ rem1 = 0;\r
+ if ( bSig <= aSig ) {\r
+ shift128Right( aSig, 0, 1, &aSig, &rem1 );\r
+ ++zExp;\r
+ }\r
+ zSig0 = estimateDiv128To64( aSig, rem1, bSig );\r
+ mul64To128( bSig, zSig0, &term0, &term1 );\r
+ sub128( aSig, rem1, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits64) rem0 < 0 ) {\r
+ --zSig0;\r
+ add128( rem0, rem1, 0, bSig, &rem0, &rem1 );\r
+ }\r
+ zSig1 = estimateDiv128To64( rem1, 0, bSig );\r
+ if ( (bits64) ( zSig1<<1 ) <= 8 ) {\r
+ mul64To128( bSig, zSig1, &term1, &term2 );\r
+ sub128( rem1, 0, term1, term2, &rem1, &rem2 );\r
+ while ( (sbits64) rem1 < 0 ) {\r
+ --zSig1;\r
+ add128( rem1, rem2, 0, bSig, &rem1, &rem2 );\r
+ }\r
+ zSig1 |= ( ( rem1 | rem2 ) != 0 );\r
+ }\r
+ return\r
+ roundAndPackFloatx80(\r
+ floatx80_rounding_precision, zSign, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the remainder of the extended double-precision floating-point value\r
+| `a' with respect to the corresponding value `b'. The operation is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_rem( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int32 aExp, bExp, expDiff;\r
+ bits64 aSig0, aSig1, bSig;\r
+ bits64 q, term0, term1, alternateASig0, alternateASig1;\r
+ floatx80 z;\r
+\r
+ aSig0 = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ bSig = extractFloatx80Frac( b );\r
+ bExp = extractFloatx80Exp( b );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig0<<1 )\r
+ || ( ( bExp == 0x7FFF ) && (bits64) ( bSig<<1 ) ) ) {\r
+ return propagateFloatx80NaN( a, b );\r
+ }\r
+ goto invalid;\r
+ }\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( (bits64) ( bSig<<1 ) ) return propagateFloatx80NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( bSig == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = floatx80_default_nan_low;\r
+ z.high = floatx80_default_nan_high;\r
+ return z;\r
+ }\r
+ normalizeFloatx80Subnormal( bSig, &bExp, &bSig );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( (bits64) ( aSig0<<1 ) == 0 ) return a;\r
+ normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );\r
+ }\r
+ bSig |= LIT64( 0x8000000000000000 );\r
+ zSign = aSign;\r
+ expDiff = aExp - bExp;\r
+ aSig1 = 0;\r
+ if ( expDiff < 0 ) {\r
+ if ( expDiff < -1 ) return a;\r
+ shift128Right( aSig0, 0, 1, &aSig0, &aSig1 );\r
+ expDiff = 0;\r
+ }\r
+ q = ( bSig <= aSig0 );\r
+ if ( q ) aSig0 -= bSig;\r
+ expDiff -= 64;\r
+ while ( 0 < expDiff ) {\r
+ q = estimateDiv128To64( aSig0, aSig1, bSig );\r
+ q = ( 2 < q ) ? q - 2 : 0;\r
+ mul64To128( bSig, q, &term0, &term1 );\r
+ sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );\r
+ shortShift128Left( aSig0, aSig1, 62, &aSig0, &aSig1 );\r
+ expDiff -= 62;\r
+ }\r
+ expDiff += 64;\r
+ if ( 0 < expDiff ) {\r
+ q = estimateDiv128To64( aSig0, aSig1, bSig );\r
+ q = ( 2 < q ) ? q - 2 : 0;\r
+ q >>= 64 - expDiff;\r
+ mul64To128( bSig, q<<( 64 - expDiff ), &term0, &term1 );\r
+ sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );\r
+ shortShift128Left( 0, bSig, 64 - expDiff, &term0, &term1 );\r
+ while ( le128( term0, term1, aSig0, aSig1 ) ) {\r
+ ++q;\r
+ sub128( aSig0, aSig1, term0, term1, &aSig0, &aSig1 );\r
+ }\r
+ }\r
+ else {\r
+ term1 = 0;\r
+ term0 = bSig;\r
+ }\r
+ sub128( term0, term1, aSig0, aSig1, &alternateASig0, &alternateASig1 );\r
+ if ( lt128( alternateASig0, alternateASig1, aSig0, aSig1 )\r
+ || ( eq128( alternateASig0, alternateASig1, aSig0, aSig1 )\r
+ && ( q & 1 ) )\r
+ ) {\r
+ aSig0 = alternateASig0;\r
+ aSig1 = alternateASig1;\r
+ zSign = ! zSign;\r
+ }\r
+ return\r
+ normalizeRoundAndPackFloatx80(\r
+ 80, zSign, bExp + expDiff, aSig0, aSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the square root of the extended double-precision floating-point\r
+| value `a'. The operation is performed according to the IEC/IEEE Standard\r
+| for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 floatx80_sqrt( floatx80 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, zExp;\r
+ bits64 aSig0, aSig1, zSig0, zSig1, doubleZSig0;\r
+ bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
+ floatx80 z;\r
+\r
+ aSig0 = extractFloatx80Frac( a );\r
+ aExp = extractFloatx80Exp( a );\r
+ aSign = extractFloatx80Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( (bits64) ( aSig0<<1 ) ) return propagateFloatx80NaN( a, a );\r
+ if ( ! aSign ) return a;\r
+ goto invalid;\r
+ }\r
+ if ( aSign ) {\r
+ if ( ( aExp | aSig0 ) == 0 ) return a;\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = floatx80_default_nan_low;\r
+ z.high = floatx80_default_nan_high;\r
+ return z;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( aSig0 == 0 ) return packFloatx80( 0, 0, 0 );\r
+ normalizeFloatx80Subnormal( aSig0, &aExp, &aSig0 );\r
+ }\r
+ zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFF;\r
+ zSig0 = estimateSqrt32( aExp, aSig0>>32 );\r
+ shift128Right( aSig0, 0, 2 + ( aExp & 1 ), &aSig0, &aSig1 );\r
+ zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );\r
+ doubleZSig0 = zSig0<<1;\r
+ mul64To128( zSig0, zSig0, &term0, &term1 );\r
+ sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits64) rem0 < 0 ) {\r
+ --zSig0;\r
+ doubleZSig0 -= 2;\r
+ add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );\r
+ }\r
+ zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );\r
+ if ( ( zSig1 & LIT64( 0x3FFFFFFFFFFFFFFF ) ) <= 5 ) {\r
+ if ( zSig1 == 0 ) zSig1 = 1;\r
+ mul64To128( doubleZSig0, zSig1, &term1, &term2 );\r
+ sub128( rem1, 0, term1, term2, &rem1, &rem2 );\r
+ mul64To128( zSig1, zSig1, &term2, &term3 );\r
+ sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );\r
+ while ( (sbits64) rem1 < 0 ) {\r
+ --zSig1;\r
+ shortShift128Left( 0, zSig1, 1, &term2, &term3 );\r
+ term3 |= 1;\r
+ term2 |= doubleZSig0;\r
+ add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );\r
+ }\r
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
+ }\r
+ shortShift128Left( 0, zSig1, 1, &zSig0, &zSig1 );\r
+ zSig0 |= doubleZSig0;\r
+ return\r
+ roundAndPackFloatx80(\r
+ floatx80_rounding_precision, 0, zExp, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the extended double-precision floating-point value `a' is\r
+| equal to the corresponding value `b', and 0 otherwise. The comparison is\r
+| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag floatx80_eq( floatx80 a, floatx80 b )\r
+{\r
+\r
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )\r
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )\r
+ ) {\r
+ if ( floatx80_is_signaling_nan( a )\r
+ || floatx80_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ return\r
+ ( a.low == b.low )\r
+ && ( ( a.high == b.high )\r
+ || ( ( a.low == 0 )\r
+ && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )\r
+ );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the extended double-precision floating-point value `a' is\r
+| less than or equal to the corresponding value `b', and 0 otherwise. The\r
+| comparison is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag floatx80_le( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )\r
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloatx80Sign( a );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ == 0 );\r
+ }\r
+ return\r
+ aSign ? le128( b.high, b.low, a.high, a.low )\r
+ : le128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the extended double-precision floating-point value `a' is\r
+| less than the corresponding value `b', and 0 otherwise. The comparison\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag floatx80_lt( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )\r
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloatx80Sign( a );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ != 0 );\r
+ }\r
+ return\r
+ aSign ? lt128( b.high, b.low, a.high, a.low )\r
+ : lt128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the extended double-precision floating-point value `a' is equal\r
+| to the corresponding value `b', and 0 otherwise. The invalid exception is\r
+| raised if either operand is a NaN. Otherwise, the comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag floatx80_eq_signaling( floatx80 a, floatx80 b )\r
+{\r
+\r
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )\r
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ return\r
+ ( a.low == b.low )\r
+ && ( ( a.high == b.high )\r
+ || ( ( a.low == 0 )\r
+ && ( (bits16) ( ( a.high | b.high )<<1 ) == 0 ) )\r
+ );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the extended double-precision floating-point value `a' is less\r
+| than or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs\r
+| do not cause an exception. Otherwise, the comparison is performed according\r
+| to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag floatx80_le_quiet( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )\r
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )\r
+ ) {\r
+ if ( floatx80_is_signaling_nan( a )\r
+ || floatx80_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloatx80Sign( a );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ || ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ == 0 );\r
+ }\r
+ return\r
+ aSign ? le128( b.high, b.low, a.high, a.low )\r
+ : le128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the extended double-precision floating-point value `a' is less\r
+| than the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause\r
+| an exception. Otherwise, the comparison is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag floatx80_lt_quiet( floatx80 a, floatx80 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloatx80Exp( a ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( a )<<1 ) )\r
+ || ( ( extractFloatx80Exp( b ) == 0x7FFF )\r
+ && (bits64) ( extractFloatx80Frac( b )<<1 ) )\r
+ ) {\r
+ if ( floatx80_is_signaling_nan( a )\r
+ || floatx80_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloatx80Sign( a );\r
+ bSign = extractFloatx80Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ && ( ( ( (bits16) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ != 0 );\r
+ }\r
+ return\r
+ aSign ? lt128( b.high, b.low, a.high, a.low )\r
+ : lt128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+#endif\r
+\r
+#ifdef FLOAT128\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the 32-bit two's complement integer format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic---which means in particular that the conversion is rounded\r
+| according to the current rounding mode. If `a' is a NaN, the largest\r
+| positive integer is returned. Otherwise, if the conversion overflows, the\r
+| largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 float128_to_int32( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig0, aSig1;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) aSign = 0;\r
+ if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );\r
+ aSig0 |= ( aSig1 != 0 );\r
+ shiftCount = 0x4028 - aExp;\r
+ if ( 0 < shiftCount ) shift64RightJamming( aSig0, shiftCount, &aSig0 );\r
+ return roundAndPackInt32( aSign, aSig0 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the 32-bit two's complement integer format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic, except that the conversion is always rounded toward zero. If\r
+| `a' is a NaN, the largest positive integer is returned. Otherwise, if the\r
+| conversion overflows, the largest integer with the same sign as `a' is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int32 float128_to_int32_round_to_zero( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig0, aSig1, savedASig;\r
+ int32 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ aSig0 |= ( aSig1 != 0 );\r
+ if ( 0x401E < aExp ) {\r
+ if ( ( aExp == 0x7FFF ) && aSig0 ) aSign = 0;\r
+ goto invalid;\r
+ }\r
+ else if ( aExp < 0x3FFF ) {\r
+ if ( aExp || aSig0 ) float_exception_flags |= float_flag_inexact;\r
+ return 0;\r
+ }\r
+ aSig0 |= LIT64( 0x0001000000000000 );\r
+ shiftCount = 0x402F - aExp;\r
+ savedASig = aSig0;\r
+ aSig0 >>= shiftCount;\r
+ z = aSig0;\r
+ if ( aSign ) z = - z;\r
+ if ( ( z < 0 ) ^ aSign ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
+ }\r
+ if ( ( aSig0<<shiftCount ) != savedASig ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the 64-bit two's complement integer format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic---which means in particular that the conversion is rounded\r
+| according to the current rounding mode. If `a' is a NaN, the largest\r
+| positive integer is returned. Otherwise, if the conversion overflows, the\r
+| largest integer with the same sign as `a' is returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 float128_to_int64( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig0, aSig1;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );\r
+ shiftCount = 0x402F - aExp;\r
+ if ( shiftCount <= 0 ) {\r
+ if ( 0x403E < aExp ) {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign\r
+ || ( ( aExp == 0x7FFF )\r
+ && ( aSig1 || ( aSig0 != LIT64( 0x0001000000000000 ) ) )\r
+ )\r
+ ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ shortShift128Left( aSig0, aSig1, - shiftCount, &aSig0, &aSig1 );\r
+ }\r
+ else {\r
+ shift64ExtraRightJamming( aSig0, aSig1, shiftCount, &aSig0, &aSig1 );\r
+ }\r
+ return roundAndPackInt64( aSign, aSig0, aSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the 64-bit two's complement integer format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic, except that the conversion is always rounded toward zero.\r
+| If `a' is a NaN, the largest positive integer is returned. Otherwise, if\r
+| the conversion overflows, the largest integer with the same sign as `a' is\r
+| returned.\r
+*----------------------------------------------------------------------------*/\r
+\r
+int64 float128_to_int64_round_to_zero( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, shiftCount;\r
+ bits64 aSig0, aSig1;\r
+ int64 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( aExp ) aSig0 |= LIT64( 0x0001000000000000 );\r
+ shiftCount = aExp - 0x402F;\r
+ if ( 0 < shiftCount ) {\r
+ if ( 0x403E <= aExp ) {\r
+ aSig0 &= LIT64( 0x0000FFFFFFFFFFFF );\r
+ if ( ( a.high == LIT64( 0xC03E000000000000 ) )\r
+ && ( aSig1 < LIT64( 0x0002000000000000 ) ) ) {\r
+ if ( aSig1 ) float_exception_flags |= float_flag_inexact;\r
+ }\r
+ else {\r
+ float_raise( float_flag_invalid );\r
+ if ( ! aSign || ( ( aExp == 0x7FFF ) && ( aSig0 | aSig1 ) ) ) {\r
+ return LIT64( 0x7FFFFFFFFFFFFFFF );\r
+ }\r
+ }\r
+ return (sbits64) LIT64( 0x8000000000000000 );\r
+ }\r
+ z = ( aSig0<<shiftCount ) | ( aSig1>>( ( - shiftCount ) & 63 ) );\r
+ if ( (bits64) ( aSig1<<shiftCount ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ }\r
+ else {\r
+ if ( aExp < 0x3FFF ) {\r
+ if ( aExp | aSig0 | aSig1 ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ return 0;\r
+ }\r
+ z = aSig0>>( - shiftCount );\r
+ if ( aSig1\r
+ || ( shiftCount && (bits64) ( aSig0<<( shiftCount & 63 ) ) ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ }\r
+ if ( aSign ) z = - z;\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the single-precision floating-point format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float32 float128_to_float32( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 aSig0, aSig1;\r
+ bits32 zSig;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) {\r
+ return commonNaNToFloat32( float128ToCommonNaN( a ) );\r
+ }\r
+ return packFloat32( aSign, 0xFF, 0 );\r
+ }\r
+ aSig0 |= ( aSig1 != 0 );\r
+ shift64RightJamming( aSig0, 18, &aSig0 );\r
+ zSig = aSig0;\r
+ if ( aExp || zSig ) {\r
+ zSig |= 0x40000000;\r
+ aExp -= 0x3F81;\r
+ }\r
+ return roundAndPackFloat32( aSign, aExp, zSig );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the double-precision floating-point format. The conversion\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float64 float128_to_float64( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 aSig0, aSig1;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) {\r
+ return commonNaNToFloat64( float128ToCommonNaN( a ) );\r
+ }\r
+ return packFloat64( aSign, 0x7FF, 0 );\r
+ }\r
+ shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );\r
+ aSig0 |= ( aSig1 != 0 );\r
+ if ( aExp || aSig0 ) {\r
+ aSig0 |= LIT64( 0x4000000000000000 );\r
+ aExp -= 0x3C01;\r
+ }\r
+ return roundAndPackFloat64( aSign, aExp, aSig0 );\r
+\r
+}\r
+\r
+#ifdef FLOATX80\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of converting the quadruple-precision floating-point\r
+| value `a' to the extended double-precision floating-point format. The\r
+| conversion is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+floatx80 float128_to_floatx80( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 aSig0, aSig1;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) {\r
+ return commonNaNToFloatx80( float128ToCommonNaN( a ) );\r
+ }\r
+ return packFloatx80( aSign, 0x7FFF, LIT64( 0x8000000000000000 ) );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloatx80( aSign, 0, 0 );\r
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ else {\r
+ aSig0 |= LIT64( 0x0001000000000000 );\r
+ }\r
+ shortShift128Left( aSig0, aSig1, 15, &aSig0, &aSig1 );\r
+ return roundAndPackFloatx80( 80, aSign, aExp, aSig0, aSig1 );\r
+\r
+}\r
+\r
+#endif\r
+\r
+/*----------------------------------------------------------------------------\r
+| Rounds the quadruple-precision floating-point value `a' to an integer, and\r
+| returns the result as a quadruple-precision floating-point value. The\r
+| operation is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_round_to_int( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp;\r
+ bits64 lastBitMask, roundBitsMask;\r
+ int8 roundingMode;\r
+ float128 z;\r
+\r
+ aExp = extractFloat128Exp( a );\r
+ if ( 0x402F <= aExp ) {\r
+ if ( 0x406F <= aExp ) {\r
+ if ( ( aExp == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) )\r
+ ) {\r
+ return propagateFloat128NaN( a, a );\r
+ }\r
+ return a;\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask = ( lastBitMask<<( 0x406E - aExp ) )<<1;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z = a;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ if ( lastBitMask ) {\r
+ add128( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );\r
+ if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;\r
+ }\r
+ else {\r
+ if ( (sbits64) z.low < 0 ) {\r
+ ++z.high;\r
+ if ( (bits64) ( z.low<<1 ) == 0 ) z.high &= ~1;\r
+ }\r
+ }\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat128Sign( z )\r
+ ^ ( roundingMode == float_round_up ) ) {\r
+ add128( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );\r
+ }\r
+ }\r
+ z.low &= ~ roundBitsMask;\r
+ }\r
+ else {\r
+ if ( aExp < 0x3FFF ) {\r
+ if ( ( ( (bits64) ( a.high<<1 ) ) | a.low ) == 0 ) return a;\r
+ float_exception_flags |= float_flag_inexact;\r
+ aSign = extractFloat128Sign( a );\r
+ switch ( float_rounding_mode ) {\r
+ case float_round_nearest_even:\r
+ if ( ( aExp == 0x3FFE )\r
+ && ( extractFloat128Frac0( a )\r
+ | extractFloat128Frac1( a ) )\r
+ ) {\r
+ return packFloat128( aSign, 0x3FFF, 0, 0 );\r
+ }\r
+ break;\r
+ case float_round_down:\r
+ return\r
+ aSign ? packFloat128( 1, 0x3FFF, 0, 0 )\r
+ : packFloat128( 0, 0, 0, 0 );\r
+ case float_round_up:\r
+ return\r
+ aSign ? packFloat128( 1, 0, 0, 0 )\r
+ : packFloat128( 0, 0x3FFF, 0, 0 );\r
+ }\r
+ return packFloat128( aSign, 0, 0, 0 );\r
+ }\r
+ lastBitMask = 1;\r
+ lastBitMask <<= 0x402F - aExp;\r
+ roundBitsMask = lastBitMask - 1;\r
+ z.low = 0;\r
+ z.high = a.high;\r
+ roundingMode = float_rounding_mode;\r
+ if ( roundingMode == float_round_nearest_even ) {\r
+ z.high += lastBitMask>>1;\r
+ if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {\r
+ z.high &= ~ lastBitMask;\r
+ }\r
+ }\r
+ else if ( roundingMode != float_round_to_zero ) {\r
+ if ( extractFloat128Sign( z )\r
+ ^ ( roundingMode == float_round_up ) ) {\r
+ z.high |= ( a.low != 0 );\r
+ z.high += roundBitsMask;\r
+ }\r
+ }\r
+ z.high &= ~ roundBitsMask;\r
+ }\r
+ if ( ( z.low != a.low ) || ( z.high != a.high ) ) {\r
+ float_exception_flags |= float_flag_inexact;\r
+ }\r
+ return z;\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the absolute values of the quadruple-precision\r
+| floating-point values `a' and `b'. If `zSign' is 1, the sum is negated\r
+| before being returned. `zSign' is ignored if the result is a NaN.\r
+| The addition is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float128 addFloat128Sigs( float128 a, float128 b, flag zSign )\r
+{\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;\r
+ int32 expDiff;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ bSig1 = extractFloat128Frac1( b );\r
+ bSig0 = extractFloat128Frac0( b );\r
+ bExp = extractFloat128Exp( b );\r
+ expDiff = aExp - bExp;\r
+ if ( 0 < expDiff ) {\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig0 |= LIT64( 0x0001000000000000 );\r
+ }\r
+ shift128ExtraRightJamming(\r
+ bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );\r
+ zExp = aExp;\r
+ }\r
+ else if ( expDiff < 0 ) {\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );\r
+ return packFloat128( zSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig0 |= LIT64( 0x0001000000000000 );\r
+ }\r
+ shift128ExtraRightJamming(\r
+ aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );\r
+ zExp = bExp;\r
+ }\r
+ else {\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 | bSig0 | bSig1 ) {\r
+ return propagateFloat128NaN( a, b );\r
+ }\r
+ return a;\r
+ }\r
+ add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
+ if ( aExp == 0 ) return packFloat128( zSign, 0, zSig0, zSig1 );\r
+ zSig2 = 0;\r
+ zSig0 |= LIT64( 0x0002000000000000 );\r
+ zExp = aExp;\r
+ goto shiftRight1;\r
+ }\r
+ aSig0 |= LIT64( 0x0001000000000000 );\r
+ add128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
+ --zExp;\r
+ if ( zSig0 < LIT64( 0x0002000000000000 ) ) goto roundAndPack;\r
+ ++zExp;\r
+ shiftRight1:\r
+ shift128ExtraRightJamming(\r
+ zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );\r
+ roundAndPack:\r
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the absolute values of the quadruple-\r
+| precision floating-point values `a' and `b'. If `zSign' is 1, the\r
+| difference is negated before being returned. `zSign' is ignored if the\r
+| result is a NaN. The subtraction is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+static float128 subFloat128Sigs( float128 a, float128 b, flag zSign )\r
+{\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;\r
+ int32 expDiff;\r
+ float128 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ bSig1 = extractFloat128Frac1( b );\r
+ bSig0 = extractFloat128Frac0( b );\r
+ bExp = extractFloat128Exp( b );\r
+ expDiff = aExp - bExp;\r
+ shortShift128Left( aSig0, aSig1, 14, &aSig0, &aSig1 );\r
+ shortShift128Left( bSig0, bSig1, 14, &bSig0, &bSig1 );\r
+ if ( 0 < expDiff ) goto aExpBigger;\r
+ if ( expDiff < 0 ) goto bExpBigger;\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 | bSig0 | bSig1 ) {\r
+ return propagateFloat128NaN( a, b );\r
+ }\r
+ float_raise( float_flag_invalid );\r
+ z.low = float128_default_nan_low;\r
+ z.high = float128_default_nan_high;\r
+ return z;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ aExp = 1;\r
+ bExp = 1;\r
+ }\r
+ if ( bSig0 < aSig0 ) goto aBigger;\r
+ if ( aSig0 < bSig0 ) goto bBigger;\r
+ if ( bSig1 < aSig1 ) goto aBigger;\r
+ if ( aSig1 < bSig1 ) goto bBigger;\r
+ return packFloat128( float_rounding_mode == float_round_down, 0, 0, 0 );\r
+ bExpBigger:\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );\r
+ return packFloat128( zSign ^ 1, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ ++expDiff;\r
+ }\r
+ else {\r
+ aSig0 |= LIT64( 0x4000000000000000 );\r
+ }\r
+ shift128RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );\r
+ bSig0 |= LIT64( 0x4000000000000000 );\r
+ bBigger:\r
+ sub128( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );\r
+ zExp = bExp;\r
+ zSign ^= 1;\r
+ goto normalizeRoundAndPack;\r
+ aExpBigger:\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ --expDiff;\r
+ }\r
+ else {\r
+ bSig0 |= LIT64( 0x4000000000000000 );\r
+ }\r
+ shift128RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );\r
+ aSig0 |= LIT64( 0x4000000000000000 );\r
+ aBigger:\r
+ sub128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
+ zExp = aExp;\r
+ normalizeRoundAndPack:\r
+ --zExp;\r
+ return normalizeRoundAndPackFloat128( zSign, zExp - 14, zSig0, zSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of adding the quadruple-precision floating-point values\r
+| `a' and `b'. The operation is performed according to the IEC/IEEE Standard\r
+| for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_add( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat128Sign( a );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return addFloat128Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return subFloat128Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of subtracting the quadruple-precision floating-point\r
+| values `a' and `b'. The operation is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_sub( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ aSign = extractFloat128Sign( a );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aSign == bSign ) {\r
+ return subFloat128Sigs( a, b, aSign );\r
+ }\r
+ else {\r
+ return addFloat128Sigs( a, b, aSign );\r
+ }\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of multiplying the quadruple-precision floating-point\r
+| values `a' and `b'. The operation is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_mul( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;\r
+ float128 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ bSig1 = extractFloat128Frac1( b );\r
+ bSig0 = extractFloat128Frac0( b );\r
+ bExp = extractFloat128Exp( b );\r
+ bSign = extractFloat128Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( ( aSig0 | aSig1 )\r
+ || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {\r
+ return propagateFloat128NaN( a, b );\r
+ }\r
+ if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;\r
+ return packFloat128( zSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );\r
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = float128_default_nan_low;\r
+ z.high = float128_default_nan_high;\r
+ return z;\r
+ }\r
+ return packFloat128( zSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );\r
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( ( bSig0 | bSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );\r
+ normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
+ }\r
+ zExp = aExp + bExp - 0x4000;\r
+ aSig0 |= LIT64( 0x0001000000000000 );\r
+ shortShift128Left( bSig0, bSig1, 16, &bSig0, &bSig1 );\r
+ mul128To256( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );\r
+ add128( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );\r
+ zSig2 |= ( zSig3 != 0 );\r
+ if ( LIT64( 0x0002000000000000 ) <= zSig0 ) {\r
+ shift128ExtraRightJamming(\r
+ zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );\r
+ ++zExp;\r
+ }\r
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the result of dividing the quadruple-precision floating-point value\r
+| `a' by the corresponding value `b'. The operation is performed according to\r
+| the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_div( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int32 aExp, bExp, zExp;\r
+ bits64 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;\r
+ bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
+ float128 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ bSig1 = extractFloat128Frac1( b );\r
+ bSig0 = extractFloat128Frac0( b );\r
+ bExp = extractFloat128Exp( b );\r
+ bSign = extractFloat128Sign( b );\r
+ zSign = aSign ^ bSign;\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, b );\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );\r
+ goto invalid;\r
+ }\r
+ return packFloat128( zSign, 0x7FFF, 0, 0 );\r
+ }\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );\r
+ return packFloat128( zSign, 0, 0, 0 );\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( ( bSig0 | bSig1 ) == 0 ) {\r
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = float128_default_nan_low;\r
+ z.high = float128_default_nan_high;\r
+ return z;\r
+ }\r
+ float_raise( float_flag_divbyzero );\r
+ return packFloat128( zSign, 0x7FFF, 0, 0 );\r
+ }\r
+ normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( zSign, 0, 0, 0 );\r
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ zExp = aExp - bExp + 0x3FFD;\r
+ shortShift128Left(\r
+ aSig0 | LIT64( 0x0001000000000000 ), aSig1, 15, &aSig0, &aSig1 );\r
+ shortShift128Left(\r
+ bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );\r
+ if ( le128( bSig0, bSig1, aSig0, aSig1 ) ) {\r
+ shift128Right( aSig0, aSig1, 1, &aSig0, &aSig1 );\r
+ ++zExp;\r
+ }\r
+ zSig0 = estimateDiv128To64( aSig0, aSig1, bSig0 );\r
+ mul128By64To192( bSig0, bSig1, zSig0, &term0, &term1, &term2 );\r
+ sub192( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );\r
+ while ( (sbits64) rem0 < 0 ) {\r
+ --zSig0;\r
+ add192( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );\r
+ }\r
+ zSig1 = estimateDiv128To64( rem1, rem2, bSig0 );\r
+ if ( ( zSig1 & 0x3FFF ) <= 4 ) {\r
+ mul128By64To192( bSig0, bSig1, zSig1, &term1, &term2, &term3 );\r
+ sub192( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );\r
+ while ( (sbits64) rem1 < 0 ) {\r
+ --zSig1;\r
+ add192( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );\r
+ }\r
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
+ }\r
+ shift128ExtraRightJamming( zSig0, zSig1, 0, 15, &zSig0, &zSig1, &zSig2 );\r
+ return roundAndPackFloat128( zSign, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the remainder of the quadruple-precision floating-point value `a'\r
+| with respect to the corresponding value `b'. The operation is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_rem( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign, zSign;\r
+ int32 aExp, bExp, expDiff;\r
+ bits64 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;\r
+ bits64 allZero, alternateASig0, alternateASig1, sigMean1;\r
+ sbits64 sigMean0;\r
+ float128 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ bSig1 = extractFloat128Frac1( b );\r
+ bSig0 = extractFloat128Frac0( b );\r
+ bExp = extractFloat128Exp( b );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( ( aSig0 | aSig1 )\r
+ || ( ( bExp == 0x7FFF ) && ( bSig0 | bSig1 ) ) ) {\r
+ return propagateFloat128NaN( a, b );\r
+ }\r
+ goto invalid;\r
+ }\r
+ if ( bExp == 0x7FFF ) {\r
+ if ( bSig0 | bSig1 ) return propagateFloat128NaN( a, b );\r
+ return a;\r
+ }\r
+ if ( bExp == 0 ) {\r
+ if ( ( bSig0 | bSig1 ) == 0 ) {\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = float128_default_nan_low;\r
+ z.high = float128_default_nan_high;\r
+ return z;\r
+ }\r
+ normalizeFloat128Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return a;\r
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ expDiff = aExp - bExp;\r
+ if ( expDiff < -1 ) return a;\r
+ shortShift128Left(\r
+ aSig0 | LIT64( 0x0001000000000000 ),\r
+ aSig1,\r
+ 15 - ( expDiff < 0 ),\r
+ &aSig0,\r
+ &aSig1\r
+ );\r
+ shortShift128Left(\r
+ bSig0 | LIT64( 0x0001000000000000 ), bSig1, 15, &bSig0, &bSig1 );\r
+ q = le128( bSig0, bSig1, aSig0, aSig1 );\r
+ if ( q ) sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );\r
+ expDiff -= 64;\r
+ while ( 0 < expDiff ) {\r
+ q = estimateDiv128To64( aSig0, aSig1, bSig0 );\r
+ q = ( 4 < q ) ? q - 4 : 0;\r
+ mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );\r
+ shortShift192Left( term0, term1, term2, 61, &term1, &term2, &allZero );\r
+ shortShift128Left( aSig0, aSig1, 61, &aSig0, &allZero );\r
+ sub128( aSig0, 0, term1, term2, &aSig0, &aSig1 );\r
+ expDiff -= 61;\r
+ }\r
+ if ( -64 < expDiff ) {\r
+ q = estimateDiv128To64( aSig0, aSig1, bSig0 );\r
+ q = ( 4 < q ) ? q - 4 : 0;\r
+ q >>= - expDiff;\r
+ shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );\r
+ expDiff += 52;\r
+ if ( expDiff < 0 ) {\r
+ shift128Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );\r
+ }\r
+ else {\r
+ shortShift128Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );\r
+ }\r
+ mul128By64To192( bSig0, bSig1, q, &term0, &term1, &term2 );\r
+ sub128( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );\r
+ }\r
+ else {\r
+ shift128Right( aSig0, aSig1, 12, &aSig0, &aSig1 );\r
+ shift128Right( bSig0, bSig1, 12, &bSig0, &bSig1 );\r
+ }\r
+ do {\r
+ alternateASig0 = aSig0;\r
+ alternateASig1 = aSig1;\r
+ ++q;\r
+ sub128( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );\r
+ } while ( 0 <= (sbits64) aSig0 );\r
+ add128(\r
+ aSig0, aSig1, alternateASig0, alternateASig1, &sigMean0, &sigMean1 );\r
+ if ( ( sigMean0 < 0 )\r
+ || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {\r
+ aSig0 = alternateASig0;\r
+ aSig1 = alternateASig1;\r
+ }\r
+ zSign = ( (sbits64) aSig0 < 0 );\r
+ if ( zSign ) sub128( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );\r
+ return\r
+ normalizeRoundAndPackFloat128( aSign ^ zSign, bExp - 4, aSig0, aSig1 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns the square root of the quadruple-precision floating-point value `a'.\r
+| The operation is performed according to the IEC/IEEE Standard for Binary\r
+| Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+float128 float128_sqrt( float128 a )\r
+{\r
+ flag aSign;\r
+ int32 aExp, zExp;\r
+ bits64 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;\r
+ bits64 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
+ float128 z;\r
+\r
+ aSig1 = extractFloat128Frac1( a );\r
+ aSig0 = extractFloat128Frac0( a );\r
+ aExp = extractFloat128Exp( a );\r
+ aSign = extractFloat128Sign( a );\r
+ if ( aExp == 0x7FFF ) {\r
+ if ( aSig0 | aSig1 ) return propagateFloat128NaN( a, a );\r
+ if ( ! aSign ) return a;\r
+ goto invalid;\r
+ }\r
+ if ( aSign ) {\r
+ if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;\r
+ invalid:\r
+ float_raise( float_flag_invalid );\r
+ z.low = float128_default_nan_low;\r
+ z.high = float128_default_nan_high;\r
+ return z;\r
+ }\r
+ if ( aExp == 0 ) {\r
+ if ( ( aSig0 | aSig1 ) == 0 ) return packFloat128( 0, 0, 0, 0 );\r
+ normalizeFloat128Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
+ }\r
+ zExp = ( ( aExp - 0x3FFF )>>1 ) + 0x3FFE;\r
+ aSig0 |= LIT64( 0x0001000000000000 );\r
+ zSig0 = estimateSqrt32( aExp, aSig0>>17 );\r
+ shortShift128Left( aSig0, aSig1, 13 - ( aExp & 1 ), &aSig0, &aSig1 );\r
+ zSig0 = estimateDiv128To64( aSig0, aSig1, zSig0<<32 ) + ( zSig0<<30 );\r
+ doubleZSig0 = zSig0<<1;\r
+ mul64To128( zSig0, zSig0, &term0, &term1 );\r
+ sub128( aSig0, aSig1, term0, term1, &rem0, &rem1 );\r
+ while ( (sbits64) rem0 < 0 ) {\r
+ --zSig0;\r
+ doubleZSig0 -= 2;\r
+ add128( rem0, rem1, zSig0>>63, doubleZSig0 | 1, &rem0, &rem1 );\r
+ }\r
+ zSig1 = estimateDiv128To64( rem1, 0, doubleZSig0 );\r
+ if ( ( zSig1 & 0x1FFF ) <= 5 ) {\r
+ if ( zSig1 == 0 ) zSig1 = 1;\r
+ mul64To128( doubleZSig0, zSig1, &term1, &term2 );\r
+ sub128( rem1, 0, term1, term2, &rem1, &rem2 );\r
+ mul64To128( zSig1, zSig1, &term2, &term3 );\r
+ sub192( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );\r
+ while ( (sbits64) rem1 < 0 ) {\r
+ --zSig1;\r
+ shortShift128Left( 0, zSig1, 1, &term2, &term3 );\r
+ term3 |= 1;\r
+ term2 |= doubleZSig0;\r
+ add192( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );\r
+ }\r
+ zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
+ }\r
+ shift128ExtraRightJamming( zSig0, zSig1, 0, 14, &zSig0, &zSig1, &zSig2 );\r
+ return roundAndPackFloat128( 0, zExp, zSig0, zSig1, zSig2 );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the quadruple-precision floating-point value `a' is equal to\r
+| the corresponding value `b', and 0 otherwise. The comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float128_eq( float128 a, float128 b )\r
+{\r
+\r
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )\r
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )\r
+ ) {\r
+ if ( float128_is_signaling_nan( a )\r
+ || float128_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ return\r
+ ( a.low == b.low )\r
+ && ( ( a.high == b.high )\r
+ || ( ( a.low == 0 )\r
+ && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )\r
+ );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the quadruple-precision floating-point value `a' is less than\r
+| or equal to the corresponding value `b', and 0 otherwise. The comparison\r
+| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
+| Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float128_le( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )\r
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat128Sign( a );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ == 0 );\r
+ }\r
+ return\r
+ aSign ? le128( b.high, b.low, a.high, a.low )\r
+ : le128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the quadruple-precision floating-point value `a' is less than\r
+| the corresponding value `b', and 0 otherwise. The comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float128_lt( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )\r
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ aSign = extractFloat128Sign( a );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ != 0 );\r
+ }\r
+ return\r
+ aSign ? lt128( b.high, b.low, a.high, a.low )\r
+ : lt128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the quadruple-precision floating-point value `a' is equal to\r
+| the corresponding value `b', and 0 otherwise. The invalid exception is\r
+| raised if either operand is a NaN. Otherwise, the comparison is performed\r
+| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float128_eq_signaling( float128 a, float128 b )\r
+{\r
+\r
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )\r
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )\r
+ ) {\r
+ float_raise( float_flag_invalid );\r
+ return 0;\r
+ }\r
+ return\r
+ ( a.low == b.low )\r
+ && ( ( a.high == b.high )\r
+ || ( ( a.low == 0 )\r
+ && ( (bits64) ( ( a.high | b.high )<<1 ) == 0 ) )\r
+ );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the quadruple-precision floating-point value `a' is less than\r
+| or equal to the corresponding value `b', and 0 otherwise. Quiet NaNs do not\r
+| cause an exception. Otherwise, the comparison is performed according to the\r
+| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float128_le_quiet( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )\r
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )\r
+ ) {\r
+ if ( float128_is_signaling_nan( a )\r
+ || float128_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat128Sign( a );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ || ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ == 0 );\r
+ }\r
+ return\r
+ aSign ? le128( b.high, b.low, a.high, a.low )\r
+ : le128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+/*----------------------------------------------------------------------------\r
+| Returns 1 if the quadruple-precision floating-point value `a' is less than\r
+| the corresponding value `b', and 0 otherwise. Quiet NaNs do not cause an\r
+| exception. Otherwise, the comparison is performed according to the IEC/IEEE\r
+| Standard for Binary Floating-Point Arithmetic.\r
+*----------------------------------------------------------------------------*/\r
+\r
+flag float128_lt_quiet( float128 a, float128 b )\r
+{\r
+ flag aSign, bSign;\r
+\r
+ if ( ( ( extractFloat128Exp( a ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( a ) | extractFloat128Frac1( a ) ) )\r
+ || ( ( extractFloat128Exp( b ) == 0x7FFF )\r
+ && ( extractFloat128Frac0( b ) | extractFloat128Frac1( b ) ) )\r
+ ) {\r
+ if ( float128_is_signaling_nan( a )\r
+ || float128_is_signaling_nan( b ) ) {\r
+ float_raise( float_flag_invalid );\r
+ }\r
+ return 0;\r
+ }\r
+ aSign = extractFloat128Sign( a );\r
+ bSign = extractFloat128Sign( b );\r
+ if ( aSign != bSign ) {\r
+ return\r
+ aSign\r
+ && ( ( ( (bits64) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
+ != 0 );\r
+ }\r
+ return\r
+ aSign ? lt128( b.high, b.low, a.high, a.low )\r
+ : lt128( a.high, a.low, b.high, b.low );\r
+\r
+}\r
+\r
+#endif\r
+\r
projects / riscv-isa-sim.git / commitdiff