{
0x0: decode OP2
{
- //Throw an illegal instruction acception
- 0x0: Trap::illtrap({{fault = new IllegalInstruction;}});
- 0x1: Branch::bpcc({{
- switch(BPCC)
+ format Branch
+ {
+ //Throw an illegal instruction acception
+ 0x0: Trap::illtrap({{fault = new IllegalInstruction;}});
- 0x1: decode CC02
++ 0x1: decode BPCC
{
- case 1:
- case 3:
- fault = new IllegalInstruction;
- case 0:
- 0x0: decode CC12
- {
- 0x0: bpcci({{
- if(passesCondition(CcrIcc, COND2))
- ;//branchHere
- }});
- 0x1: bpccx({{
++ 0x0: bpcci({{
++ if(passesCondition(CcrIcc, COND2))
++ ;//branchHere
++ }});
++ 0x2: bpccx({{
+ if(passesCondition(CcrXcc, COND2))
+ ;//branchHere
- }});
- }
++ }});
+ }
+ 0x2: bicc({{
if(passesCondition(CcrIcc, COND2))
;//branchHere
- break;
- case 2:
- if(passesCondition(CcrXcc, COND2))
- ;//branchHere
- break;
- }
- }});//BPcc
- 0x2: Branch::bicc({{
- if(passesCondition(CcrIcc, COND2))
- ;//branchHere
- }});//Bicc
- 0x3: Branch::bpr({{
- switch(RCOND2)
+ }});
+ 0x3: decode RCOND2
{
- case 0:
- case 4:
- fault = new IllegalInstruction;
- case 1:
- if(Rs1 == 0)
- ;//branchHere
- break;
- case 2:
- if(Rs1 <= 0)
- ;//branchHere
- break;
- case 3:
- if(Rs1 < 0)
- ;//branchHere
- break;
- case 5:
- if(Rs1 != 0)
- ;//branchHere
- break;
- case 6:
- if(Rs1 > 0)
- ;//branchHere
- break;
- case 7:
- if(Rs1 >= 0)
- ;//branchHere
- break;
+ 0x1: bpreq({{
+ if(Rs1 == 0)
+ ;//branchHere
+ }});
+ 0x2: bprle({{
+ if(Rs1 <= 0)
+ ;//branchHere
+ }});
+ 0x3: bprl({{
+ if(Rs1 < 0)
+ ;//branchHere
+ }});
+ 0x5: bprne({{
+ if(Rs1 != 0)
+ ;//branchHere
+ }});
+ 0x6: bprg({{
+ if(Rs1 > 0)
+ ;//branchHere
+ }});
+ 0x7: bprge({{
+ if(Rs1 >= 0)
+ ;//branchHere
+ }});
}
- }}); //BPr
//SETHI (or NOP if rd == 0 and imm == 0)
- 0x4: IntegerOp::sethi({{Rd = (IMM22 << 10) & 0xFFFFFC00;}});
+ 0x4: IntOp::sethi({{Rd = (IMM22 << 10) & 0xFFFFFC00;}});
0x5: Trap::fbpfcc({{fault = new FpDisabled;}});
0x6: Trap::fbfcc({{fault = new FpDisabled;}});
+ }
}
0x1: Branch::call({{
//branch here
0xF: Trap::rdprfq({{fault = IllegalInstruction;}});
0x1F: Priv::rdprver({{Rd = Ver;}});
}
- 0x2B: BasicOperate::flushw({{\\window toilet}}); //FLUSHW
- 0x2C: movcc({{
- ccBank = (MOVCC3 << 2) | CC;
- switch(ccBank)
- {
- case 0: case 1: case 2: case 3:
- fault = new FpDisabled;
- break;
- case 5: case 7:
- fault = new IllegalInstruction;
- break;
- case 4:
- if(passesCondition(CcrIcc, COND4))
- Rd = (I ? SIMM11.sdw : RS2);
- break;
- case 6:
- if(passesCondition(CcrXcc, COND4))
- Rd = (I ? SIMM11.sdw : RS2);
- break;
- }
- }});//MOVcc
+ 0x2B: BasicOperate::flushw({{//window toilet}}); //FLUSHW
- 0x2C: decode CC2
++ 0x2C: decode MOVCC3
+ {
+ 0x0: Trap::movccfcc({{fault = new FpDisabled}});
- 0x1: decode CC04
++ 0x1: decode CC
+ {
- 0x0: decode CC14
- {
- 0x0: movcci({{
- if(passesCondition(CcrIcc, COND4))
- Rd = (I ? SIMM11 : RS2);
- }});
- 0x1: movccx({{
- if(passesCondition(CcrXcc, COND4))
- Rd = (I ? SIMM11 : RS2);
- }});
- }
++ 0x0: movcci({{
++ if(passesCondition(CcrIcc, COND4))
++ Rd = (I ? SIMM11 : RS2);
++ }});
++ 0x2: movccx({{
++ if(passesCondition(CcrXcc, COND4))
++ Rd = (I ? SIMM11 : RS2);
++ }});
+ }
+ }
0x2D: sdivx({{
- int64_t val2 = (I ? SIMM13.sdw : Rs2.sdw);
- if(val2 == 0) fault = new DivisionByZero;
- else Rd.sdw = Rs1.sdw / val2;
+ if(Rs2_or_imm13 == 0) fault = new DivisionByZero;
+ else Rd.sdw = Rs1.sdw / Rs2_or_imm13;
}});//SDIVX
0x2E: decode RS1 {
- 0x0: IntegerOp::popc({{
- int64_t count = 0, val2 = (I ? SIMM13.sdw : Rs2.sdw);
- uint8_t oneBits[] = {0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4}
+ 0x0: IntOp::popc({{
+ int64_t count = 0, val2 = Rs2_or_imm;
+ uint8_t oneBits[] = {0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4};
for(unsigned int x = 0; x < 16; x++)
{
- count += oneBits[val2 & 0xF];
+ count += oneBits[Rs2_or_imm13 & 0xF];
val2 >> 4;
}
}});//POPC
0x34: Trap::fpop1({{fault = new FpDisabled;}});
0x35: Trap::fpop2({{fault = new FpDisabled;}});
-
0x38: Branch::jmpl({{//Stuff}}); //JMPL
0x39: Branch::return({{//Other Stuff}}); //RETURN
- 0x3A: decode CC04
+ 0x3A: decode CC
{
- // If CC04 == 1, it's an illegal instruction
- 0x0: decode CC14
- {
- 0x0: Trap::tcci({{
- if(passesCondition(CcrIcc, machInst<25:28>))
- fault = new TrapInstruction;
- }});
- 0x1: Trap::tccx({{
- if(passesCondition(CcrXcc, machInst<25:28>))
- fault = new TrapInstruction;
- }});
- }
+ 0x0: Trap::tcci({{
+#if FULL_SYSTEM
+ fault = new TrapInstruction;
+#else
- if(passesCondition(ccr_icc, machInst<25:28>))
++ if(passesCondition(CcrIcc, machInst<25:28>))
+ // At least glibc only uses trap 0,
+ // solaris/sunos may use others
+ assert((I ? Rs1 + Rs2 : Rs1 + SW_TRAP) == 0);
+ xc->syscall();
+#endif
+ }});
+ 0x2: Trap::tccx({{
+#if FULL_SYSTEM
+ fault = new TrapInstruction;
+#else
- if(passesCondition(ccr_xcc, machInst<25:28>))
++ if(passesCondition(CcrXcc, machInst<25:28>))
+ // At least glibc only uses trap 0,
+ // solaris/sunos may use others
+ assert((I ? Rs1 + Rs2 : Rs1 + SW_TRAP) == 0);
+ xc->syscall();
+#endif
+ }});
}
0x3B: BasicOperate::flush({{//Lala}}); //FLUSH
0x3C: BasicOperate::save({{//leprechauns); //SAVE
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