gdb/x86: Fix write out of mxcsr register for xsave targets

In commit:

  commit 8ee22052f690c007556b97eed59f49350ece5ca9
  Author: Andrew Burgess <andrew.burgess@embecosm.com>
  Date:   Thu May 3 17:46:14 2018 +0100

      gdb/x86: Handle kernels using compact xsave format

in two places FXSAVE_ADDR was used instead of FXSAVE_MXCSR_ADDR to get
the address of the mxcsr register within the xsave buffer.  This will
mean we are potentially accessing the wrong location within the xsave
buffer.

There are no tests included with this patch.  The first mistake would
only trigger an issue if/when the user tries to manually set the mxcsr
register to a value that matches the random (value off stack) value
that is in the xsave buffer, in this case the change by the user will
go unnoticed by GDB, and the default value of mxcsr will be preserved.

The second mistake only happens on the code path where all x87
registers are being written out of the register cache.  I'm not sure
how to trigger that code path.

gdb/ChangeLog:

	* i387-tdep.c (i387_collect_xsave): Use FXSAVE_MXCSR_ADDR not
	FXSAVE_ADDR for the mxcsr register.

diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index a3a133c036e5a857a54c94dde1025e04608a5044..67610d7144b71b9207c549bf6918e500e0496aa9 100644 (file)
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,8 @@
+2018-05-11  Andrew Burgess  <andrew.burgess@embecosm.com>
+
+       * i387-tdep.c (i387_collect_xsave): Use FXSAVE_MXCSR_ADDR not
+       FXSAVE_ADDR for the mxcsr register.
+
 2018-05-11  Max Filippov  <jcmvbkbc@gmail.com>
 
        * configure.tgt (xtensa*-*-linux*): Drop gdb_target definition.

diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c
index aca70c186f930fd53dfea1f1272ab33d74d80d27..3effc35b17418245c5422ea0cca7f5b5ac8733be 100644 (file)
--- a/gdb/i387-tdep.c
+++ b/gdb/i387-tdep.c
@@ -1490,7 +1490,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
         require clearing.  */
       if ((clear_bv & (X86_XSTATE_AVX | X86_XSTATE_SSE))
          == (X86_XSTATE_AVX | X86_XSTATE_SSE))
-       store_unsigned_integer (FXSAVE_ADDR (tdep, regs, i), 2, byte_order,
+       store_unsigned_integer (FXSAVE_MXCSR_ADDR (regs), 2, byte_order,
                                I387_MXCSR_INIT_VAL);
 
       if ((clear_bv & X86_XSTATE_X87))
@@ -1643,7 +1643,7 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
        {
          i = I387_MXCSR_REGNUM (tdep);
          regcache_raw_collect (regcache, i, raw);
-         p = FXSAVE_ADDR (tdep, regs, i);
+         p = FXSAVE_MXCSR_ADDR (regs);
          if (memcmp (raw, p, 4))
            {
              /* Now, we need to mark one of either SSE of AVX as enabled.