let EncodingType = 11; // SIInstrEncodingType::VINTRP
let Uses = [M0];
+ let neverHasSideEffects = 1;
}
class VOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> :
/* Interpolation Intrinsics */
def int_SI_set_M0 : Intrinsic <[llvm_i32_ty], [llvm_i32_ty]>;
- class Interp : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
+ class Interp : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>;
def int_SI_fs_interp_linear_center : Interp;
def int_SI_fs_interp_linear_centroid : Interp;
args[1] = attr_number;
args[2] = params;
si_shader_ctx->radeon_bld.inputs[soa_index] =
- lp_build_intrinsic(gallivm->builder, intr_name,
- input_type, args, 3);
+ build_intrinsic(base->gallivm->builder, intr_name,
+ input_type, args, 3, LLVMReadOnlyAttribute);
}
}