RISC-V: Handle out-of-range calls to undefined weak.

	bfd/
	PR ld/23244
	* elfnn-riscv.c (riscv_elf_relocate_section) <R_RISCV_CALL>: Check
	for and handle an undefined weak with no PLT.

	ld/
	* testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run new weak ref tests.
	* testsuite/ld-riscv-elf/weakref.ld: New.
	* testsuite/ld-riscv-elf/weakref32.d: New.
	* testsuite/ld-riscv-elf/weakref32.s: New.
	* testsuite/ld-riscv-elf/weakref64.d: New.
	* testsuite/ld-riscv-elf/weakref64.s: New.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 250e4165b072e643403f2194ca03ddcc9c323a2e..a8f4688005651674b9e826253c6467fdd134fe3b 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,9 @@
 2018-06-03  Jim Wilson  <jimw@sifive.com>
 
+       PR ld/23244
+       * elfnn-riscv.c (riscv_elf_relocate_section) <R_RISCV_CALL>: Check
+       for and handle an undefined weak with no PLT.
+
        PR ld/22756
        * elfnn-riscv.c (riscv_relax_delete_bytes): Add versioned_hidden check
        to code that ignores duplicate symbols.

diff --git a/bfd/elfnn-riscv.c b/bfd/elfnn-riscv.c
index a0bdee54b2dc285092b14cded248ce8244ee8862..7b1ca47083c69d88c4ec04f28c893cb9da7d0021 100644 (file)
--- a/bfd/elfnn-riscv.c
+++ b/bfd/elfnn-riscv.c
@@ -1931,8 +1931,24 @@ riscv_elf_relocate_section (bfd *output_bfd,
          }
          break;
 
-       case R_RISCV_CALL_PLT:
        case R_RISCV_CALL:
+         /* Handle a call to an undefined weak function.  This won't be
+            relaxed, so we have to handle it here.  */
+         if (h != NULL && h->root.type == bfd_link_hash_undefweak
+             && h->plt.offset == MINUS_ONE)
+           {
+             /* We can use x0 as the base register.  */
+             bfd_vma insn = bfd_get_32 (input_bfd,
+                                        contents + rel->r_offset + 4);
+             insn &= ~(OP_MASK_RS1 << OP_SH_RS1);
+             bfd_put_32 (input_bfd, insn, contents + rel->r_offset + 4);
+             /* Set the relocation value so that we get 0 after the pc
+                relative adjustment.  */
+             relocation = sec_addr (input_section) + rel->r_offset;
+           }
+         /* Fall through.  */
+
+       case R_RISCV_CALL_PLT:
        case R_RISCV_JAL:
        case R_RISCV_RVC_JUMP:
          if (bfd_link_pic (info) && h != NULL && h->plt.offset != MINUS_ONE)

diff --git a/ld/ChangeLog b/ld/ChangeLog
index f8b91bfcee94beabc4c4084b1ea3031aeaed09fd..70e30e65dfc86c8cca03a15e2c3b83667770d840 100644 (file)
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,14 @@
+2018-06-03  Sebastian Huber  <sebastian.huber@embedded-brains.de>
+           Jim Wilson  <jimw@sifive.com>
+
+       PR ld/23244
+       * testsuite/ld-riscv-elf/ld-riscv-elf.exp: Run new weak ref tests.
+       * testsuite/ld-riscv-elf/weakref.ld: New.
+       * testsuite/ld-riscv-elf/weakref32.d: New.
+       * testsuite/ld-riscv-elf/weakref32.s: New.
+       * testsuite/ld-riscv-elf/weakref64.d: New.
+       * testsuite/ld-riscv-elf/weakref64.s: New.
+
 2018-06-01  H.J. Lu  <hongjiu.lu@intel.com>
 
        * configure: Regenerated.

diff --git a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
index cd11680b55f81d4bb2e6b83d7dd0e78f3cef1f9e..c06b618744f3ad07f03063124629a1820f82f3ac 100644 (file)
--- a/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
+++ b/ld/testsuite/ld-riscv-elf/ld-riscv-elf.exp
@@ -23,6 +23,14 @@ if [istarget "riscv*-*-*"] {
     run_dump_test "c-lui"
     run_dump_test "disas-jalr"
     run_dump_test "pcrel-lo-addend"
+    run_ld_link_tests {
+       { "Weak reference 32" "-T weakref.ld -melf32lriscv" ""
+           "-march=rv32i -mabi=ilp32" {weakref32.s}
+           {{objdump -d weakref32.d}} "weakref32"}
+       { "Weak reference 64" "-T weakref.ld -melf64lriscv" ""
+           "-march=rv64i -mabi=lp64" {weakref64.s}
+           {{objdump -d weakref64.d}} "weakref64"}
+    }
 
     # The following tests require shared library support.
     if ![check_shared_lib_support] {

diff --git a/ld/testsuite/ld-riscv-elf/weakref.ld b/ld/testsuite/ld-riscv-elf/weakref.ld
new file mode 100644 (file)
index 0000000..a1d362b
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/weakref.ld
@@ -0,0 +1,6 @@
+ENTRY(_start)
+SECTIONS {
+       .text 0x90000000 : {
+               *(.text*)
+       }
+}

diff --git a/ld/testsuite/ld-riscv-elf/weakref32.d b/ld/testsuite/ld-riscv-elf/weakref32.d
new file mode 100644 (file)
index 0000000..5ede7cb
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/weakref32.d
@@ -0,0 +1,19 @@
+
+.*:     file format elf32-littleriscv
+
+
+Disassembly of section \.text:
+
+90000000 <_start>:
+90000000:      70000797                auipc   a5,0x70000
+90000004:      00078793                mv      a5,a5
+90000008:      02078263                beqz    a5,9000002c <_start\+0x2c>
+9000000c:      ff010113                addi    sp,sp,-16
+90000010:      00112623                sw      ra,12\(sp\)
+90000014:      00000097                auipc   ra,0x0
+90000018:      000000e7                jalr    zero # 0 <_start\-0x90000000>
+9000001c:      00c12083                lw      ra,12\(sp\)
+90000020:      01010113                addi    sp,sp,16
+90000024:      00000317                auipc   t1,0x0
+90000028:      00000067                jr      zero # 0 <_start\-0x90000000>
+9000002c:      00008067                ret

diff --git a/ld/testsuite/ld-riscv-elf/weakref32.s b/ld/testsuite/ld-riscv-elf/weakref32.s
new file mode 100644 (file)
index 0000000..14df041
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/weakref32.s
@@ -0,0 +1,18 @@
+       .option nopic
+       .text
+       .align  1
+       .globl  _start
+       .type   _start, @function
+_start:
+       lla     a5,f
+       beqz    a5,.L1
+       addi    sp,sp,-16
+       sw      ra,12(sp)
+       call    f
+       lw      ra,12(sp)
+       addi    sp,sp,16
+       tail    f
+.L1:
+       ret
+       .size   _start, .-_start
+       .weak   f

diff --git a/ld/testsuite/ld-riscv-elf/weakref64.d b/ld/testsuite/ld-riscv-elf/weakref64.d
new file mode 100644 (file)
index 0000000..52db9c2
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/weakref64.d
@@ -0,0 +1,19 @@
+
+.*:     file format elf64-littleriscv
+
+
+Disassembly of section \.text:
+
+0000000090000000 <_start>:
+    90000000:  000007b7                lui     a5,0x0
+    90000004:  00078793                mv      a5,a5
+    90000008:  02078263                beqz    a5,9000002c <_start\+0x2c>
+    9000000c:  ff010113                addi    sp,sp,-16
+    90000010:  00113423                sd      ra,8\(sp\)
+    90000014:  00000097                auipc   ra,0x0
+    90000018:  000000e7                jalr    zero # 0 <_start\-0x90000000>
+    9000001c:  00813083                ld      ra,8\(sp\)
+    90000020:  01010113                addi    sp,sp,16
+    90000024:  00000317                auipc   t1,0x0
+    90000028:  00000067                jr      zero # 0 <_start\-0x90000000>
+    9000002c:  00008067                ret

diff --git a/ld/testsuite/ld-riscv-elf/weakref64.s b/ld/testsuite/ld-riscv-elf/weakref64.s
new file mode 100644 (file)
index 0000000..5872626
--- /dev/null
+++ b/ld/testsuite/ld-riscv-elf/weakref64.s
@@ -0,0 +1,18 @@
+       .option nopic
+       .text
+       .align  1
+       .globl  _start
+       .type   _start, @function
+_start:
+       lla     a5,f
+       beqz    a5,.L1
+       addi    sp,sp,-16
+       sd      ra,8(sp)
+       call    f
+       ld      ra,8(sp)
+       addi    sp,sp,16
+       tail    f
+.L1:
+       ret
+       .size   _start, .-_start
+       .weak   f