i965: Share emit_fb_write() between brw_wm_emit.c and brw_wm_glsl.c

This should fix issues with antialiased lines in GLSL.

diff --git a/src/mesa/drivers/dri/i965/brw_wm.h b/src/mesa/drivers/dri/i965/brw_wm.h
index eba828f6e36057bf010aa664665991289da1abf7..bde0c366bd1c9d2a4227c92263e899f04668adea 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm.h
+++ b/src/mesa/drivers/dri/i965/brw_wm.h
@@ -353,6 +353,12 @@ void emit_dph(struct brw_compile *p,
              GLuint mask,
              const struct brw_reg *arg0,
              const struct brw_reg *arg1);
+void emit_fb_write(struct brw_wm_compile *c,
+                  struct brw_reg *arg0,
+                  struct brw_reg *arg1,
+                  struct brw_reg *arg2,
+                  GLuint target,
+                  GLuint eot);
 void emit_frontfacing(struct brw_compile *p,
                      const struct brw_reg *dst,
                      GLuint mask);

diff --git a/src/mesa/drivers/dri/i965/brw_wm_emit.c b/src/mesa/drivers/dri/i965/brw_wm_emit.c
index 6eaa2792be4c50a7eb5f94b0955a355032ce5a06..d02e3cb9acfcd2a9328ef78aee0d1e03784bf90e 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_emit.c
@@ -1042,7 +1042,13 @@ static void fire_fb_write( struct brw_wm_compile *c,
                           GLuint eot )
 {
    struct brw_compile *p = &c->func;
-   
+   struct brw_reg dst;
+
+   if (c->dispatch_width == 16)
+      dst = retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW);
+   else
+      dst = retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW);
+
    /* Pass through control information:
     */
 /*  mov (8) m1.0<1>:ud   r1.0<8;8,1>:ud   { Align1 NoMask } */
@@ -1059,7 +1065,7 @@ static void fire_fb_write( struct brw_wm_compile *c,
    /* Send framebuffer write message: */
 /*  send (16) null.0<1>:uw m0               r0.0<8;8,1>:uw   0x85a04000:ud    { Align1 EOT } */
    brw_fb_WRITE(p,
-               retype(vec16(brw_null_reg()), BRW_REGISTER_TYPE_UW),
+               dst,
                base_reg,
                retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
                target,         
@@ -1091,12 +1097,12 @@ static void emit_aa( struct brw_wm_compile *c,
  * \param arg1  the pass-through depth value
  * \param arg2  the shader-computed depth value
  */
-static void emit_fb_write( struct brw_wm_compile *c,
-                          struct brw_reg *arg0,
-                          struct brw_reg *arg1,
-                          struct brw_reg *arg2,
-                          GLuint target,
-                          GLuint eot)
+void emit_fb_write(struct brw_wm_compile *c,
+                  struct brw_reg *arg0,
+                  struct brw_reg *arg1,
+                  struct brw_reg *arg2,
+                  GLuint target,
+                  GLuint eot)
 {
    struct brw_compile *p = &c->func;
    GLuint nr = 2;
@@ -1110,30 +1116,27 @@ static void emit_fb_write( struct brw_wm_compile *c,
    /* I don't really understand how this achieves the color interleave
     * (ie RGBARGBA) in the result:  [Do the saturation here]
     */
-   {
-      brw_push_insn_state(p);
-      
-      for (channel = 0; channel < 4; channel++) {
-        /*  mov (8) m2.0<1>:ud   r28.0<8;8,1>:ud  { Align1 } */
-        /*  mov (8) m6.0<1>:ud   r29.0<8;8,1>:ud  { Align1 SecHalf } */
+   brw_push_insn_state(p);
 
-        brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-        brw_MOV(p,
-                brw_message_reg(nr + channel),
-                arg0[channel]);
-       
+   for (channel = 0; channel < 4; channel++) {
+      /*  mov (8) m2.0<1>:ud   r28.0<8;8,1>:ud  { Align1 } */
+      /*  mov (8) m6.0<1>:ud   r29.0<8;8,1>:ud  { Align1 SecHalf } */
+      brw_set_compression_control(p, BRW_COMPRESSION_NONE);
+      brw_MOV(p,
+             brw_message_reg(nr + channel),
+             arg0[channel]);
+
+      if (c->dispatch_width == 16) {
         brw_set_compression_control(p, BRW_COMPRESSION_2NDHALF);
         brw_MOV(p,
                 brw_message_reg(nr + channel + 4),
                 sechalf(arg0[channel]));
       }
-
-      /* skip over the regs populated above:
-       */
-      nr += 8;
-   
-      brw_pop_insn_state(p);
    }
+   /* skip over the regs populated above:
+    */
+   nr += 8;
+   brw_pop_insn_state(p);
 
    if (c->key.source_depth_to_render_target)
    {
@@ -1183,7 +1186,7 @@ static void emit_fb_write( struct brw_wm_compile *c,
              get_element_ud(brw_vec8_grf(1,0), 6), 
              brw_imm_ud(1<<26)); 
 
-      jmp = brw_JMPI(p, ip, ip, brw_imm_d(0));
+      jmp = brw_JMPI(p, ip, ip, brw_imm_w(0));
       {
         emit_aa(c, arg1, 2);
         fire_fb_write(c, 0, nr, target, eot);
@@ -1197,7 +1200,6 @@ static void emit_fb_write( struct brw_wm_compile *c,
    }
 }
 
-
 /**
  * Move a GPR to scratch memory. 
  */

diff --git a/src/mesa/drivers/dri/i965/brw_wm_fp.c b/src/mesa/drivers/dri/i965/brw_wm_fp.c
index a453250e79ad28b8c5c9ffb84df43448d3dc47bd..549afd31de42570a315f6be182b8f4446e6cdb46 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_fp.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_fp.c
@@ -956,7 +956,7 @@ static void precalc_txp( struct brw_wm_compile *c,
 
 
 
-static void emit_fb_write( struct brw_wm_compile *c )
+static void emit_render_target_writes( struct brw_wm_compile *c )
 {
    struct prog_src_register payload_r0_depth = src_reg(PROGRAM_PAYLOAD, PAYLOAD_DEPTH);
    struct prog_src_register outdepth = src_reg(PROGRAM_OUTPUT, FRAG_RESULT_DEPTH);
@@ -1153,7 +1153,7 @@ void brw_wm_pass_fp( struct brw_wm_compile *c )
         out->DstReg.WriteMask = 0;
         break;
       case OPCODE_END:
-        emit_fb_write(c);
+        emit_render_target_writes(c);
         break;
       case OPCODE_PRINT:
         break;

diff --git a/src/mesa/drivers/dri/i965/brw_wm_glsl.c b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
index d0987362a4e431e838d9e04a185e380dd434c742..be89bcf4ba6b5438c8bb371f8e7e10ff8b3d9992 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_wm_glsl.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_glsl.c
@@ -671,103 +671,6 @@ unalias3(struct brw_wm_compile *c,
     release_tmps(c, mark);
 }
 
-static void fire_fb_write( struct brw_wm_compile *c,
-                           GLuint base_reg,
-                           GLuint nr,
-                           GLuint target,
-                           GLuint eot)
-{
-    struct brw_compile *p = &c->func;
-    /* Pass through control information:
-     */
-    /*  mov (8) m1.0<1>:ud   r1.0<8;8,1>:ud   { Align1 NoMask } */
-    {
-       brw_push_insn_state(p);
-       brw_set_mask_control(p, BRW_MASK_DISABLE); /* ? */
-       brw_MOV(p,
-               brw_message_reg(base_reg + 1),
-               brw_vec8_grf(1, 0));
-       brw_pop_insn_state(p);
-    }
-    /* Send framebuffer write message: */
-    brw_fb_WRITE(p,
-           retype(vec8(brw_null_reg()), BRW_REGISTER_TYPE_UW),
-           base_reg,
-           retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UW),
-           target,              
-           nr,
-           0,
-           eot);
-}
-
-static void emit_fb_write(struct brw_wm_compile *c,
-                          const struct prog_instruction *inst)
-{
-    struct brw_compile *p = &c->func;
-    int nr = 2;
-    int channel;
-    GLuint target, eot;
-    struct brw_reg src0;
-
-    /* Reserve a space for AA - may not be needed:
-     */
-    if (c->key.aa_dest_stencil_reg)
-       nr += 1;
-
-    brw_push_insn_state(p);
-    for (channel = 0; channel < 4; channel++) {
-        src0 = get_src_reg(c,  inst, 0, channel);
-        /*  mov (8) m2.0<1>:ud   r28.0<8;8,1>:ud  { Align1 } */
-        /*  mov (8) m6.0<1>:ud   r29.0<8;8,1>:ud  { Align1 SecHalf } */
-        brw_MOV(p, brw_message_reg(nr + channel), src0);
-    }
-    /* skip over the regs populated above: */
-    nr += 8;
-    brw_pop_insn_state(p);
-
-    if (c->key.source_depth_to_render_target) {
-       if (c->key.computes_depth) {
-          src0 = get_src_reg(c, inst, 2, 2);
-          brw_MOV(p, brw_message_reg(nr), src0);
-       }
-       else {
-          src0 = get_src_reg(c, inst, 1, 1);
-          brw_MOV(p, brw_message_reg(nr), src0);
-       }
-
-       nr += 2;
-    }
-
-    if (c->key.dest_depth_reg) {
-        const GLuint comp = c->key.dest_depth_reg / 2;
-        const GLuint off = c->key.dest_depth_reg % 2;
-
-        if (off != 0) {
-            /* XXX this code needs review/testing */
-            struct brw_reg arg1_0 = get_src_reg(c, inst, 1, comp);
-            struct brw_reg arg1_1 = get_src_reg(c, inst, 1, comp+1);
-
-            brw_push_insn_state(p);
-            brw_set_compression_control(p, BRW_COMPRESSION_NONE);
-
-            brw_MOV(p, brw_message_reg(nr), offset(arg1_0, 1));
-            /* 2nd half? */
-            brw_MOV(p, brw_message_reg(nr+1), arg1_1);
-            brw_pop_insn_state(p);
-        }
-        else
-        {
-            struct brw_reg src =  get_src_reg(c, inst, 1, 1);
-            brw_MOV(p, brw_message_reg(nr), src);
-        }
-        nr += 2;
-   }
-
-    target = INST_AUX_GET_TARGET(inst->Aux);
-    eot = inst->Aux & INST_AUX_EOT;
-    fire_fb_write(c, 0, nr, target, eot);
-}
-
 static void emit_arl(struct brw_wm_compile *c,
                      const struct prog_instruction *inst)
 {
@@ -2158,7 +2061,9 @@ static void brw_wm_emit_glsl(struct brw_context *brw, struct brw_wm_compile *c)
                emit_wpos_xy(c, dst, dst_flags, args[0]);
                break;
            case WM_FB_WRITE:
-               emit_fb_write(c, inst);
+               emit_fb_write(c, args[0], args[1], args[2],
+                             INST_AUX_GET_TARGET(inst->Aux),
+                             inst->Aux & INST_AUX_EOT);
                break;
            case WM_FRONTFACING:
                emit_frontfacing(p, dst, dst_flags);