+2017-10-21 Simon Marchi <simon.marchi@polymtl.ca>
+
+ * infrun.h: Include common/byte-vector.h.
+ (struct displaced_step_closure): New struct.
+ (struct buf_displaced_step_closure): New struct.
+ * infrun.c (displaced_step_closure::~displaced_step_closure):
+ Provide default implementation.
+ (displaced_step_clear): Deallocate step closure with delete.
+ * aarch64-tdep.c (displaced_step_closure): Rename to ...
+ (aarch64_displaced_step_closure): ... this, extend
+ displaced_step_closure.
+ (aarch64_displaced_step_data) <dsc>: Change type to
+ aarch64_displaced_step_closure.
+ (aarch64_displaced_step_copy_insn): Adjust to type change, use
+ unique_ptr.
+ (aarch64_displaced_step_fixup): Add cast for displaced step
+ closure.
+ * amd64-tdep.c (displaced_step_closure): Rename to ...
+ (amd64_displaced_step_closure): ... this, extend
+ displaced_step_closure.
+ <insn_buf>: Change type to std::vector<gdb_byte>.
+ <max_len>: Remove.
+ (fixup_riprel): Change type of DSC parameter, adjust to type
+ change of insn_buf.
+ (fixup_displaced_copy): Change type of DSC parameter.
+ (amd64_displaced_step_copy_insn): Instantiate
+ amd64_displaced_step_closure.
+ (amd64_displaced_step_fixup): Add cast for closure type, adjust
+ to type change of insn_buf.
+ * arm-linux-tdep.c (arm_linux_cleanup_svc): Change type of
+ parameter DSC.
+ (arm_linux_copy_svc): Likewise.
+ (cleanup_kernel_helper_return): Likewise.
+ (arm_catch_kernel_helper_return): Likewise.
+ (arm_linux_displaced_step_copy_insn): Instantiate
+ arm_displaced_step_closure.
+ * arm-tdep.c (arm_pc_is_thumb): Add cast for closure.
+ (displaced_read_reg): Change type of parameter DSC.
+ (branch_write_pc): Likewise.
+ (load_write_pc): Likewise.
+ (alu_write_pc): Likewise.
+ (displaced_write_reg): Likewise.
+ (arm_copy_unmodified): Likewise.
+ (thumb_copy_unmodified_32bit): Likewise.
+ (thumb_copy_unmodified_16bit): Likewise.
+ (cleanup_preload): Likewise.
+ (install_preload): Likewise.
+ (arm_copy_preload): Likewise.
+ (thumb2_copy_preload): Likewise.
+ (install_preload_reg): Likewise.
+ (arm_copy_preload_reg): Likewise.
+ (cleanup_copro_load_store): Likewise.
+ (install_copro_load_store): Likewise.
+ (arm_copy_copro_load_store) Likewise.
+ (thumb2_copy_copro_load_store): Likewise.
+ (cleanup_branch): Likewise.
+ (install_b_bl_blx): Likewise.
+ (arm_copy_b_bl_blx): Likewise.
+ (thumb2_copy_b_bl_blx): Likewise.
+ (thumb_copy_b): Likewise.
+ (install_bx_blx_reg): Likewise.
+ (arm_copy_bx_blx_reg): Likewise.
+ (thumb_copy_bx_blx_reg): Likewise.
+ (cleanup_alu_imm): Likewise.
+ (arm_copy_alu_imm): Likewise.
+ (thumb2_copy_alu_imm): Likewise.
+ (cleanup_alu_reg): Likewise.
+ (install_alu_reg): Likewise.
+ (arm_copy_alu_reg): Likewise.
+ (thumb_copy_alu_reg): Likewise.
+ (cleanup_alu_shifted_reg): Likewise.
+ (install_alu_shifted_reg): Likewise.
+ (arm_copy_alu_shifted_reg): Likewise.
+ (cleanup_load): Likewise.
+ (cleanup_store): Likewise.
+ (arm_copy_extra_ld_st): Likewise.
+ (install_load_store): Likewise.
+ (thumb2_copy_load_literal): Likewise.
+ (thumb2_copy_load_reg_imm): Likewise.
+ (arm_copy_ldr_str_ldrb_strb): Likewise.
+ (cleanup_block_load_all): Likewise.
+ (cleanup_block_store_pc): Likewise.
+ (cleanup_block_load_pc): Likewise.
+ (arm_copy_block_xfer): Likewise.
+ (thumb2_copy_block_xfer): Likewise.
+ (cleanup_svc): Likewise.
+ (install_svc): Likewise.
+ (arm_copy_svc): Likewise.
+ (thumb_copy_svc): Likewise.
+ (arm_copy_undef): Likewise.
+ (thumb_32bit_copy_undef): Likewise.
+ (arm_copy_unpred): Likewise.
+ (arm_decode_misc_memhint_neon): Likewise.
+ (arm_decode_unconditional): Likewise.
+ (arm_decode_miscellaneous): Likewise.
+ (arm_decode_dp_misc): Likewise.
+ (arm_decode_ld_st_word_ubyte): Likewise.
+ (arm_decode_media): Likewise.
+ (arm_decode_b_bl_ldmstm): Likewise.
+ (arm_decode_ext_reg_ld_st): Likewise.
+ (thumb2_decode_dp_shift_reg): Likewise.
+ (thumb2_decode_ext_reg_ld_st): Likewise.
+ (arm_decode_svc_copro): Likewise.
+ (thumb2_decode_svc_copro): Likewise.
+ (install_pc_relative): Likewise.
+ (thumb_copy_pc_relative_16bit): Likewise.
+ (thumb_decode_pc_relative_16bit): Likewise.
+ (thumb_copy_pc_relative_32bit): Likewise.
+ (thumb_copy_16bit_ldr_literal): Likewise.
+ (thumb_copy_cbnz_cbz): Likewise.
+ (thumb2_copy_table_branch): Likewise.
+ (cleanup_pop_pc_16bit_all): Likewise.
+ (thumb_copy_pop_pc_16bit): Likewise.
+ (thumb_process_displaced_16bit_insn): Likewise.
+ (decode_thumb_32bit_ld_mem_hints): Likewise.
+ (thumb_process_displaced_32bit_insn): Likewise.
+ (thumb_process_displaced_insn): Likewise.
+ (arm_process_displaced_insn): Likewise.
+ (arm_displaced_init_closure): Likewise.
+ (arm_displaced_step_fixup): Add cast for closure.
+ * arm-tdep.h: Include infrun.h.
+ (displaced_step_closure): Rename to ...
+ (arm_displaced_step_closure): ... this, extend
+ displaced_step_closure.
+ <u::svc::copy_svc_os>: Change type of parameter DSC.
+ <cleanup>: Likewise.
+ (arm_process_displaced_insn): Likewise.
+ (arm_displaced_init_closure): Likewise.
+ (displaced_read_reg): Likewise.
+ (displaced_write_reg): Likewise.
+ * i386-linux-tdep.c (i386_linux_displaced_step_copy_insn):
+ Adjust.
+ * i386-tdep.h: Include infrun.h.
+ (i386_displaced_step_closure): New typedef.
+ * i386-tdep.c (i386_displaced_step_copy_insn): Use
+ i386_displaced_step_closure.
+ (i386_displaced_step_fixup): Adjust.
+ * rs6000-tdep.c (ppc_displaced_step_closure): New typedef.
+ (ppc_displaced_step_copy_insn): Use ppc_displaced_step_closure
+ and unique_ptr.
+ (ppc_displaced_step_fixup): Adjust.
+ * s390-linux-tdep.c (s390_displaced_step_closure): New typedef.
+ (s390_displaced_step_copy_insn): Use s390_displaced_step_closure
+ and unique_ptr.
+ (s390_displaced_step_fixup): Adjust.
+
2017-10-21 Simon Marchi <simon.marchi@polymtl.ca>
* interps.h (interp_resume, interp_suspend, interp_set_temp):
{
struct bound_minimal_symbol sym;
char type;
- struct displaced_step_closure* dsc
- = get_displaced_step_closure_by_addr(memaddr);
+ arm_displaced_step_closure *dsc
+ = ((arm_displaced_step_closure * )
+ get_displaced_step_closure_by_addr (memaddr));
/* If checking the mode of displaced instruction in copy area, the mode
should be determined by instruction on the original address. */
location. */
ULONGEST
-displaced_read_reg (struct regcache *regs, struct displaced_step_closure *dsc,
+displaced_read_reg (struct regcache *regs, arm_displaced_step_closure *dsc,
int regno)
{
ULONGEST ret;
/* Write to the PC as from a branch instruction. */
static void
-branch_write_pc (struct regcache *regs, struct displaced_step_closure *dsc,
+branch_write_pc (struct regcache *regs, arm_displaced_step_closure *dsc,
ULONGEST val)
{
if (!dsc->is_thumb)
/* Write to the PC as if from a load instruction. */
static void
-load_write_pc (struct regcache *regs, struct displaced_step_closure *dsc,
+load_write_pc (struct regcache *regs, arm_displaced_step_closure *dsc,
ULONGEST val)
{
if (DISPLACED_STEPPING_ARCH_VERSION >= 5)
/* Write to the PC as if from an ALU instruction. */
static void
-alu_write_pc (struct regcache *regs, struct displaced_step_closure *dsc,
+alu_write_pc (struct regcache *regs, arm_displaced_step_closure *dsc,
ULONGEST val)
{
if (DISPLACED_STEPPING_ARCH_VERSION >= 7 && !dsc->is_thumb)
this is controlled by the WRITE_PC argument. */
void
-displaced_write_reg (struct regcache *regs, struct displaced_step_closure *dsc,
+displaced_write_reg (struct regcache *regs, arm_displaced_step_closure *dsc,
int regno, ULONGEST val, enum pc_write_style write_pc)
{
if (regno == ARM_PC_REGNUM)
static int
arm_copy_unmodified (struct gdbarch *gdbarch, uint32_t insn,
- const char *iname, struct displaced_step_closure *dsc)
+ const char *iname, arm_displaced_step_closure *dsc)
{
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog, "displaced: copying insn %.8lx, "
static int
thumb_copy_unmodified_32bit (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, const char *iname,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog, "displaced: copying insn %.4x %.4x, "
static int
thumb_copy_unmodified_16bit (struct gdbarch *gdbarch, uint16_t insn,
const char *iname,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog, "displaced: copying insn %.4x, "
static void
cleanup_preload (struct gdbarch *gdbarch,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
displaced_write_reg (regs, dsc, 0, dsc->tmp[0], CANNOT_WRITE_PC);
if (!dsc->u.preload.immed)
static void
install_preload (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc, unsigned int rn)
+ arm_displaced_step_closure *dsc, unsigned int rn)
{
ULONGEST rn_val;
/* Preload instructions:
static int
arm_copy_preload (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rn = bits (insn, 16, 19);
static int
thumb2_copy_preload (struct gdbarch *gdbarch, uint16_t insn1, uint16_t insn2,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
unsigned int rn = bits (insn1, 0, 3);
unsigned int u_bit = bit (insn1, 7);
static void
install_preload_reg(struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc, unsigned int rn,
+ arm_displaced_step_closure *dsc, unsigned int rn,
unsigned int rm)
{
ULONGEST rn_val, rm_val;
static int
arm_copy_preload_reg (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rn = bits (insn, 16, 19);
unsigned int rm = bits (insn, 0, 3);
static void
cleanup_copro_load_store (struct gdbarch *gdbarch,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
ULONGEST rn_val = displaced_read_reg (regs, dsc, 0);
static void
install_copro_load_store (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
int writeback, unsigned int rn)
{
ULONGEST rn_val;
static int
arm_copy_copro_load_store (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rn = bits (insn, 16, 19);
static int
thumb2_copy_copro_load_store (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rn = bits (insn1, 0, 3);
static void
cleanup_branch (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
int branch_taken = condition_true (dsc->u.branch.cond, status);
static void
install_b_bl_blx (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
unsigned int cond, int exchange, int link, long offset)
{
/* Implement "BL<cond> <label>" as:
}
static int
arm_copy_b_bl_blx (struct gdbarch *gdbarch, uint32_t insn,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
unsigned int cond = bits (insn, 28, 31);
int exchange = (cond == 0xf);
static int
thumb2_copy_b_bl_blx (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int link = bit (insn2, 14);
int exchange = link && !bit (insn2, 12);
/* Copy B Thumb instructions. */
static int
thumb_copy_b (struct gdbarch *gdbarch, uint16_t insn,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int cond = 0;
int offset = 0;
static void
install_bx_blx_reg (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc, int link,
+ arm_displaced_step_closure *dsc, int link,
unsigned int cond, unsigned int rm)
{
/* Implement {BX,BLX}<cond> <reg>" as:
static int
arm_copy_bx_blx_reg (struct gdbarch *gdbarch, uint32_t insn,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
unsigned int cond = bits (insn, 28, 31);
/* BX: x12xxx1x
static int
thumb_copy_bx_blx_reg (struct gdbarch *gdbarch, uint16_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int link = bit (insn, 7);
unsigned int rm = bits (insn, 3, 6);
static void
cleanup_alu_imm (struct gdbarch *gdbarch,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
ULONGEST rd_val = displaced_read_reg (regs, dsc, 0);
displaced_write_reg (regs, dsc, 0, dsc->tmp[0], CANNOT_WRITE_PC);
static int
arm_copy_alu_imm (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rn = bits (insn, 16, 19);
unsigned int rd = bits (insn, 12, 15);
static int
thumb2_copy_alu_imm (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int op = bits (insn1, 5, 8);
unsigned int rn, rm, rd;
static void
cleanup_alu_reg (struct gdbarch *gdbarch,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
ULONGEST rd_val;
int i;
static void
install_alu_reg (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
unsigned int rd, unsigned int rn, unsigned int rm)
{
ULONGEST rd_val, rn_val, rm_val;
static int
arm_copy_alu_reg (struct gdbarch *gdbarch, uint32_t insn, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int op = bits (insn, 21, 24);
int is_mov = (op == 0xd);
static int
thumb_copy_alu_reg (struct gdbarch *gdbarch, uint16_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned rm, rd;
static void
cleanup_alu_shifted_reg (struct gdbarch *gdbarch,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
ULONGEST rd_val = displaced_read_reg (regs, dsc, 0);
int i;
static void
install_alu_shifted_reg (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
unsigned int rd, unsigned int rn, unsigned int rm,
unsigned rs)
{
static int
arm_copy_alu_shifted_reg (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int op = bits (insn, 21, 24);
int is_mov = (op == 0xd);
static void
cleanup_load (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
ULONGEST rt_val, rt_val2 = 0, rn_val;
static void
cleanup_store (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
ULONGEST rn_val = displaced_read_reg (regs, dsc, 2);
static int
arm_copy_extra_ld_st (struct gdbarch *gdbarch, uint32_t insn, int unprivileged,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
unsigned int op1 = bits (insn, 20, 24);
unsigned int op2 = bits (insn, 5, 6);
static void
install_load_store (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc, int load,
+ arm_displaced_step_closure *dsc, int load,
int immed, int writeback, int size, int usermode,
int rt, int rm, int rn)
{
static int
thumb2_copy_load_literal (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc, int size)
+ arm_displaced_step_closure *dsc, int size)
{
unsigned int u_bit = bit (insn1, 7);
unsigned int rt = bits (insn2, 12, 15);
static int
thumb2_copy_load_reg_imm (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
int writeback, int immed)
{
unsigned int rt = bits (insn2, 12, 15);
static int
arm_copy_ldr_str_ldrb_strb (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
int load, int size, int usermode)
{
int immed = !bit (insn, 25);
static void
cleanup_block_load_all (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int inc = dsc->u.block.increment;
int bump_before = dsc->u.block.before ? (inc ? 4 : -4) : 0;
static void
cleanup_block_store_pc (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
int store_executed = condition_true (dsc->u.block.cond, status);
static void
cleanup_block_load_pc (struct gdbarch *gdbarch,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
uint32_t status = displaced_read_reg (regs, dsc, ARM_PS_REGNUM);
int load_executed = condition_true (dsc->u.block.cond, status);
static int
arm_copy_block_xfer (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int load = bit (insn, 20);
int user = bit (insn, 22);
static int
thumb2_copy_block_xfer (struct gdbarch *gdbarch, uint16_t insn1, uint16_t insn2,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int rn = bits (insn1, 0, 3);
int load = bit (insn1, 4);
static void
cleanup_svc (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
CORE_ADDR resume_addr = dsc->insn_addr + dsc->insn_size;
static int
install_svc (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
/* Preparation: none.
Insn: unmodified svc.
static int
arm_copy_svc (struct gdbarch *gdbarch, uint32_t insn,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
if (debug_displaced)
static int
thumb_copy_svc (struct gdbarch *gdbarch, uint16_t insn,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
if (debug_displaced)
static int
arm_copy_undef (struct gdbarch *gdbarch, uint32_t insn,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog,
static int
thumb_32bit_copy_undef (struct gdbarch *gdbarch, uint16_t insn1, uint16_t insn2,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (debug_displaced)
static int
arm_copy_unpred (struct gdbarch *gdbarch, uint32_t insn,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (debug_displaced)
fprintf_unfiltered (gdb_stdlog, "displaced: copying unpredictable insn "
static int
arm_decode_misc_memhint_neon (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int op1 = bits (insn, 20, 26), op2 = bits (insn, 4, 7);
unsigned int rn = bits (insn, 16, 19);
static int
arm_decode_unconditional (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (bit (insn, 27) == 0)
return arm_decode_misc_memhint_neon (gdbarch, insn, regs, dsc);
static int
arm_decode_miscellaneous (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int op2 = bits (insn, 4, 6);
unsigned int op = bits (insn, 21, 22);
static int
arm_decode_dp_misc (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (bit (insn, 25))
switch (bits (insn, 20, 24))
static int
arm_decode_ld_st_word_ubyte (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int a = bit (insn, 25), b = bit (insn, 4);
uint32_t op1 = bits (insn, 20, 24);
static int
arm_decode_media (struct gdbarch *gdbarch, uint32_t insn,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
switch (bits (insn, 20, 24))
{
static int
arm_decode_b_bl_ldmstm (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
if (bit (insn, 25))
return arm_copy_b_bl_blx (gdbarch, insn, regs, dsc);
static int
arm_decode_ext_reg_ld_st (struct gdbarch *gdbarch, uint32_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int opcode = bits (insn, 20, 24);
static int
thumb2_decode_dp_shift_reg (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
/* PC is only allowed to be used in instruction MOV. */
static int
thumb2_decode_ext_reg_ld_st (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int opcode = bits (insn1, 4, 8);
static int
arm_decode_svc_copro (struct gdbarch *gdbarch, uint32_t insn,
- struct regcache *regs, struct displaced_step_closure *dsc)
+ struct regcache *regs, arm_displaced_step_closure *dsc)
{
unsigned int op1 = bits (insn, 20, 25);
int op = bit (insn, 4);
static int
thumb2_decode_svc_copro (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int coproc = bits (insn2, 8, 11);
unsigned int bit_5_8 = bits (insn1, 5, 8);
static void
install_pc_relative (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc, int rd)
+ arm_displaced_step_closure *dsc, int rd)
{
/* ADR Rd, #imm
static int
thumb_copy_pc_relative_16bit (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc,
+ arm_displaced_step_closure *dsc,
int rd, unsigned int imm)
{
static int
thumb_decode_pc_relative_16bit (struct gdbarch *gdbarch, uint16_t insn,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rd = bits (insn, 8, 10);
unsigned int imm8 = bits (insn, 0, 7);
static int
thumb_copy_pc_relative_32bit (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rd = bits (insn2, 8, 11);
/* Since immediate has the same encoding in ADR ADD and SUB, so we simply
static int
thumb_copy_16bit_ldr_literal (struct gdbarch *gdbarch, uint16_t insn1,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned int rt = bits (insn1, 8, 10);
unsigned int pc;
static int
thumb_copy_cbnz_cbz (struct gdbarch *gdbarch, uint16_t insn1,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int non_zero = bit (insn1, 11);
unsigned int imm5 = (bit (insn1, 9) << 6) | (bits (insn1, 3, 7) << 1);
static int
thumb2_copy_table_branch (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
ULONGEST rn_val, rm_val;
int is_tbh = bit (insn2, 4);
static void
cleanup_pop_pc_16bit_all (struct gdbarch *gdbarch, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
/* PC <- r7 */
int val = displaced_read_reg (regs, dsc, 7);
static int
thumb_copy_pop_pc_16bit (struct gdbarch *gdbarch, uint16_t insn1,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
dsc->u.block.regmask = insn1 & 0x00ff;
static void
thumb_process_displaced_16bit_insn (struct gdbarch *gdbarch, uint16_t insn1,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
unsigned short op_bit_12_15 = bits (insn1, 12, 15);
unsigned short op_bit_10_11 = bits (insn1, 10, 11);
decode_thumb_32bit_ld_mem_hints (struct gdbarch *gdbarch,
uint16_t insn1, uint16_t insn2,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int rt = bits (insn2, 12, 15);
int rn = bits (insn1, 0, 3);
static void
thumb_process_displaced_32bit_insn (struct gdbarch *gdbarch, uint16_t insn1,
uint16_t insn2, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int err = 0;
unsigned short op = bit (insn2, 15);
static void
thumb_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
uint16_t insn1
void
arm_process_displaced_insn (struct gdbarch *gdbarch, CORE_ADDR from,
CORE_ADDR to, struct regcache *regs,
- struct displaced_step_closure *dsc)
+ arm_displaced_step_closure *dsc)
{
int err = 0;
enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
void
arm_displaced_init_closure (struct gdbarch *gdbarch, CORE_ADDR from,
- CORE_ADDR to, struct displaced_step_closure *dsc)
+ CORE_ADDR to, arm_displaced_step_closure *dsc)
{
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
unsigned int i, len, offset;
void
arm_displaced_step_fixup (struct gdbarch *gdbarch,
- struct displaced_step_closure *dsc,
+ struct displaced_step_closure *dsc_,
CORE_ADDR from, CORE_ADDR to,
struct regcache *regs)
{
+ arm_displaced_step_closure *dsc = (arm_displaced_step_closure *) dsc_;
+
if (dsc->cleanup)
dsc->cleanup (gdbarch, regs, dsc);