(no commit message)

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index 9bccbea5523d2eb1c0f1cad2cf67ec141b60b1a7..d110d9adbd42fe63f7b47688bb93bd13adf2a824 100644 (file)
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -136,7 +136,7 @@ at least the next decade (including if added on VSX)
 **SPRs**
 
 * **SVSTATE** - Vectorisation State sufficient for Precise-Interrupt
-  Context-switchung and no adverse latency impact.
+  Context-switching and no adverse latency.
 * **SVSRR0** - identical in purpose to SRR0/1: storing SVSTATE on context-switch
   along-side MSR and PC.
 * **SVSHAPE0-3** - these are 32-bit and may be grouped in pairs, they REMAP