opcodes/loongarch: style disassembled address offsets as such

Add a modifier char 'o' telling the disassembler to print the immediate
using the address offset style, and mark the memory access instructions'
offset operands as such.

opcodes/ChangeLog:

	* loongarch-dis.c (dis_one_arg): Style disassembled address
	offsets as such when the operand has a modifier char 'o'.
	* loongarch-opc.c: Add 'o' to operands that represent address
	offsets.

Signed-off-by: WANG Xuerui <git@xen0n.name>

diff --git a/opcodes/loongarch-dis.c b/opcodes/loongarch-dis.c
index 8d44dcebb4cfbcf583d7fe5772fc092cf09fff07..11e410f176ab40803488fc818272e57874e725a3 100644 (file)
--- a/opcodes/loongarch-dis.c
+++ b/opcodes/loongarch-dis.c
@@ -134,6 +134,7 @@ dis_one_arg (char esc1, char esc2, const char *bit_field,
   struct disassemble_info *info = context;
   insn_t insn = *(insn_t *) info->private_data;
   int32_t imm, u_imm;
+  enum disassembler_style style;
 
   if (esc1)
     {
@@ -176,14 +177,26 @@ dis_one_arg (char esc1, char esc2, const char *bit_field,
       info->fprintf_styled_func (info->stream, dis_style_register, "%s", loongarch_x_disname[u_imm]);
       break;
     case 'u':
-      info->fprintf_styled_func (info->stream, dis_style_immediate, "0x%x", u_imm);
+      style = esc2 == 'o' ? dis_style_address_offset : dis_style_immediate;
+      info->fprintf_styled_func (info->stream, style, "0x%x", u_imm);
       break;
     case 's':
+      switch (esc2)
+       {
+       case 'b':
+       case 'o':
+         /* Both represent address offsets.  */
+         style = dis_style_address_offset;
+         break;
+       default:
+         style = dis_style_immediate;
+         break;
+       }
       if (imm == 0)
-       info->fprintf_styled_func (info->stream, dis_style_immediate, "%d", imm);
+       info->fprintf_styled_func (info->stream, style, "%d", imm);
       else
        {
-         info->fprintf_styled_func (info->stream, dis_style_immediate, "%d", imm);
+         info->fprintf_styled_func (info->stream, style, "%d", imm);
          info->fprintf_styled_func (info->stream, dis_style_text, "(0x%x)", u_imm);
        }
       switch (esc2)

diff --git a/opcodes/loongarch-opc.c b/opcodes/loongarch-opc.c
index 3d1d2c761a51752cc71869359d277c864dffc208..8be227cd9a99a8ff51a3f426b9ac6abd9bf2c765 100644 (file)
--- a/opcodes/loongarch-opc.c
+++ b/opcodes/loongarch-opc.c
@@ -784,26 +784,26 @@ static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] =
 static struct loongarch_opcode loongarch_load_store_opcodes[] =
 {
   /* match,    mask,           name,           format,                         macro,                  include, exclude, pinfo.  */
-  { 0x20000000, 0xff000000,    "ll.w",         "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x21000000, 0xff000000,    "sc.w",         "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x22000000, 0xff000000,    "ll.d",         "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x23000000, 0xff000000,    "sc.d",         "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x24000000, 0xff000000,    "ldptr.w",      "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x25000000, 0xff000000,    "stptr.w",      "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x26000000, 0xff000000,    "ldptr.d",      "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x27000000, 0xff000000,    "stptr.d",      "r0:5,r5:5,s10:14<<2",          0,                      0,      0,      0 },
-  { 0x28000000, 0xffc00000,    "ld.b",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x28400000, 0xffc00000,    "ld.h",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x28800000, 0xffc00000,    "ld.w",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x28c00000, 0xffc00000,    "ld.d",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x29000000, 0xffc00000,    "st.b",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x29400000, 0xffc00000,    "st.h",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x29800000, 0xffc00000,    "st.w",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x29c00000, 0xffc00000,    "st.d",         "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x2a000000, 0xffc00000,    "ld.bu",        "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x2a400000, 0xffc00000,    "ld.hu",        "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x2a800000, 0xffc00000,    "ld.wu",        "r0:5,r5:5,s10:12",             0,                      0,      0,      0 },
-  { 0x2ac00000, 0xffc00000,    "preld",        "u0:5,r5:5,s10:12",             0,                      0,      0,      0 },
+  { 0x20000000, 0xff000000,    "ll.w",         "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x21000000, 0xff000000,    "sc.w",         "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x22000000, 0xff000000,    "ll.d",         "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x23000000, 0xff000000,    "sc.d",         "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x24000000, 0xff000000,    "ldptr.w",      "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x25000000, 0xff000000,    "stptr.w",      "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x26000000, 0xff000000,    "ldptr.d",      "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x27000000, 0xff000000,    "stptr.d",      "r0:5,r5:5,so10:14<<2",         0,                      0,      0,      0 },
+  { 0x28000000, 0xffc00000,    "ld.b",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x28400000, 0xffc00000,    "ld.h",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x28800000, 0xffc00000,    "ld.w",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x28c00000, 0xffc00000,    "ld.d",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x29000000, 0xffc00000,    "st.b",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x29400000, 0xffc00000,    "st.h",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x29800000, 0xffc00000,    "st.w",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x29c00000, 0xffc00000,    "st.d",         "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x2a000000, 0xffc00000,    "ld.bu",        "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x2a400000, 0xffc00000,    "ld.hu",        "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x2a800000, 0xffc00000,    "ld.wu",        "r0:5,r5:5,so10:12",            0,                      0,      0,      0 },
+  { 0x2ac00000, 0xffc00000,    "preld",        "u0:5,r5:5,so10:12",            0,                      0,      0,      0 },
   { 0x38000000, 0xffff8000,    "ldx.b",        "r0:5,r5:5,r10:5",              0,                      0,      0,      0 },
   { 0x38040000, 0xffff8000,    "ldx.h",        "r0:5,r5:5,r10:5",              0,                      0,      0,      0 },
   { 0x38080000, 0xffff8000,    "ldx.w",        "r0:5,r5:5,r10:5",              0,                      0,      0,      0 },
@@ -936,8 +936,8 @@ static struct loongarch_opcode loongarch_load_store_opcodes[] =
 static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] =
 {
   /* match,    mask,           name,           format,                         macro,  include,                exclude, pinfo.  */
-  { 0x2b000000, 0xffc00000,    "fld.s",        "f0:5,r5:5,s10:12",             0,      0,                      0,      0 },
-  { 0x2b400000, 0xffc00000,    "fst.s",        "f0:5,r5:5,s10:12",             0,      0,                      0,      0 },
+  { 0x2b000000, 0xffc00000,    "fld.s",        "f0:5,r5:5,so10:12",            0,      0,                      0,      0 },
+  { 0x2b400000, 0xffc00000,    "fst.s",        "f0:5,r5:5,so10:12",            0,      0,                      0,      0 },
   { 0x38300000, 0xffff8000,    "fldx.s",       "f0:5,r5:5,r10:5",              0,      &LARCH_opts.ase_lp64,   0,      0 },
   { 0x38380000, 0xffff8000,    "fstx.s",       "f0:5,r5:5,r10:5",              0,      &LARCH_opts.ase_lp64,   0,      0 },
   { 0x38740000, 0xffff8000,    "fldgt.s",      "f0:5,r5:5,r10:5",              0,      &LARCH_opts.ase_lp64,   0,      0 },
@@ -950,8 +950,8 @@ static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] =
 static struct loongarch_opcode loongarch_double_float_load_store_opcodes[] =
 {
   /* match,    mask,           name,           format,                         macro,  include,                exclude, pinfo.  */
-  { 0x2b800000, 0xffc00000,    "fld.d",        "f0:5,r5:5,s10:12",             0,      0,                      0,      0 },
-  { 0x2bc00000, 0xffc00000,    "fst.d",        "f0:5,r5:5,s10:12",             0,      0,                      0,      0 },
+  { 0x2b800000, 0xffc00000,    "fld.d",        "f0:5,r5:5,so10:12",            0,      0,                      0,      0 },
+  { 0x2bc00000, 0xffc00000,    "fst.d",        "f0:5,r5:5,so10:12",            0,      0,                      0,      0 },
   { 0x38340000, 0xffff8000,    "fldx.d",       "f0:5,r5:5,r10:5",              0,      &LARCH_opts.ase_lp64,   0,      0 },
   { 0x383c0000, 0xffff8000,    "fstx.d",       "f0:5,r5:5,r10:5",              0,      &LARCH_opts.ase_lp64,   0,      0 },
   { 0x38748000, 0xffff8000,    "fldgt.d",      "f0:5,r5:5,r10:5",              0,      &LARCH_opts.ase_lp64,   0,      0 },
@@ -977,7 +977,7 @@ static struct loongarch_opcode loongarch_jmp_opcodes[] =
   { 0x40000000, 0xfc000000,    "beqz",         "r5:5,sb0:5|10:16<<2",          0,                              0, 0, 0 },
   { 0x0,       0x0,            "bnez",         "r,la",                         "bnez %1,%%b21(%2)",            0, 0, 0 },
   { 0x44000000, 0xfc000000,    "bnez",         "r5:5,sb0:5|10:16<<2",          0,                              0, 0, 0 },
-  { 0x4c000000, 0xfc000000,    "jirl",         "r0:5,r5:5,s10:16<<2",          0,                              0, 0, 0 },
+  { 0x4c000000, 0xfc000000,    "jirl",         "r0:5,r5:5,so10:16<<2",         0,                              0, 0, 0 },
   { 0x0,       0x0,            "b",            "la",                           "b %%b26(%1)",                  0, 0, 0 },
   { 0x50000000, 0xfc000000,    "b",            "sb0:10|10:16<<2",              0,                              0, 0, 0 },
   { 0x0,       0x0,            "bl",           "la",                           "bl %%b26(%1)",                 0, 0, 0 },