isl/state: Don't force-disable L2 bypass for everything

We already set the bit in the few cases where it's required by the docs so
there's no need to set it all the time.  This has no noticable perf impact
for Dota 2 on Vulkan with the time demo I have.

Reviewed-by: Chad Versace <chad.versace@intel.com>
Cc: "12.0" <mesa-stable@lists.freedesktop.org>

diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index f36c0199ada95086e6a3995af5c2ad2605985bc1..89fd69d877f7a35e223e467a91f22cede56714c8 100644 (file)
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -310,10 +310,6 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
                                                      TILEWALK_YMAJOR;
 #endif
 
-#if GEN_GEN >= 8
-   s.SamplerL2BypassModeDisable = true;
-#endif
-
 #if GEN_GEN >= 8
    s.RenderCacheReadWriteMode = WriteOnlyCache;
 #else
@@ -431,7 +427,6 @@ isl_genX(buffer_fill_state_s)(void *state,
 #endif
 
 #if (GEN_GEN >= 8)
-      .SamplerL2BypassModeDisable = true,
       .RenderCacheReadWriteMode = WriteOnlyCache,
 #else
       .RenderCacheReadWriteMode = 0,