unnecessary whitespace test

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@@ -365,6 +365,7 @@ Some learning resources I found in the community:
 * Circuitverse 16-bit <https://circuitverse.org/users/17603/projects/54486>
 * Nice example model of a Tomasulo-based architecture, with multi-issue, in-order issue, out-of-order execution, in-order commit, with reservation stations and reorder buffers, and hazard avoidance.
 <https://www.brown.edu/Departments/Engineering/Courses/En164/Tomasulo_10.pdf> 
+
 # Real/Physical Projects
 
 * [Samuel's KC5 code](http://chiselapp.com/user/kc5tja/repository/kestrel-3/dir?ci=6c559135a301f321&name=cores/cpu)