* mips.h (INSN_MACRO): Move it up to the the pinfo macros.

	(INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 0e9a49479556c3f6dfbc7c3d3d885740c34d8846..95c26e0d19b187437baf48c75032d4354923fcd8 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2008-04-28  Adam Nemet  <anemet@caviumnetworks.com>
+
+       * mips.h (INSN_MACRO): Move it up to the the pinfo macros.
+       (INSN2_M_FP_S, INSN2_M_FP_D): New pinfo2 macros.
+
 2008-04-14  Edmar Wienskoski  <edmar@freescale.com>
 
        * ppc.h: (PPC_OPCODE_E500MC): New.

diff --git a/include/opcode/mips.h b/include/opcode/mips.h
index 6ddc9d0ef785d571b1b0cdfcf26fb9004b43ee13..b7de689242800fc29288afdafe13c14cac64190e 100644 (file)
--- a/include/opcode/mips.h
+++ b/include/opcode/mips.h
@@ -456,6 +456,9 @@ struct mips_opcode
 #define INSN_MULT                   0x40000000
 /* Instruction synchronize shared memory.  */
 #define INSN_SYNC                  0x80000000
+/* Instruction is actually a macro.  It should be ignored by the
+   disassembler, and requires special treatment by the assembler.  */
+#define INSN_MACRO                  0xffffffff
 
 /* These are the bits which may be set in the pinfo2 field of an
    instruction. */
@@ -466,10 +469,14 @@ struct mips_opcode
 #define INSN2_READ_MDMX_ACC        0x00000002
 /* Instruction writes MDMX accumulator. */
 #define INSN2_WRITE_MDMX_ACC       0x00000004
-
-/* Instruction is actually a macro.  It should be ignored by the
-   disassembler, and requires special treatment by the assembler.  */
-#define INSN_MACRO                  0xffffffff
+/* Macro uses single-precision floating-point instructions.  This should
+   only be set for macros.  For instructions, FP_S in pinfo carries the
+   same information.  */
+#define INSN2_M_FP_S               0x00000008
+/* Macro uses double-precision floating-point instructions.  This should
+   only be set for macros.  For instructions, FP_D in pinfo carries the
+   same information.  */
+#define INSN2_M_FP_D               0x00000010
 
 /* Masks used to mark instructions to indicate which MIPS ISA level
    they were introduced in.  INSN_ISA_MASK masks an enumeration that