radv: add dump_shader to the NIR compiler options
authorSamuel Pitoiset <samuel.pitoiset@gmail.com>
Wed, 14 Mar 2018 09:28:49 +0000 (10:28 +0100)
committerSamuel Pitoiset <samuel.pitoiset@gmail.com>
Thu, 15 Mar 2018 16:20:00 +0000 (17:20 +0100)
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
src/amd/vulkan/radv_nir_to_llvm.c
src/amd/vulkan/radv_private.h
src/amd/vulkan/radv_shader.c
src/amd/vulkan/radv_shader.h

index 2c3b3fcc32f6530464c2d3b6a2b28b4fbf86403f..298150b8092e5a00867e972874543b5957794afe 100644 (file)
@@ -2983,8 +2983,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                                        struct nir_shader *const *shaders,
                                        int shader_count,
                                        struct radv_shader_variant_info *shader_info,
-                                       const struct radv_nir_compiler_options *options,
-                                      bool dump_shader)
+                                       const struct radv_nir_compiler_options *options)
 {
        struct radv_shader_context ctx = {0};
        unsigned i;
@@ -3152,7 +3151,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
        if (shader_count == 1)
                ac_nir_eliminate_const_vs_outputs(&ctx);
 
-       if (dump_shader) {
+       if (options->dump_shader) {
                ctx.shader_info->private_mem_vgprs =
                        ac_count_scratch_private_memory(ctx.main_function);
        }
@@ -3224,10 +3223,9 @@ static void ac_compile_llvm_module(LLVMTargetMachineRef tm,
                                   struct ac_shader_config *config,
                                   struct radv_shader_variant_info *shader_info,
                                   gl_shader_stage stage,
-                                  bool dump_shader,
                                   const struct radv_nir_compiler_options *options)
 {
-       if (dump_shader)
+       if (options->dump_shader)
                ac_dump_module(llvm_module);
 
        memset(binary, 0, sizeof(*binary));
@@ -3236,7 +3234,7 @@ static void ac_compile_llvm_module(LLVMTargetMachineRef tm,
                fprintf(stderr, "compile failed\n");
        }
 
-       if (dump_shader)
+       if (options->dump_shader)
                fprintf(stderr, "disasm:\n%s\n", binary->disasm_string);
 
        ac_shader_binary_read_config(binary, config, 0, options->supports_spill);
@@ -3347,15 +3345,16 @@ radv_compile_nir_shader(LLVMTargetMachineRef tm,
                        struct radv_shader_variant_info *shader_info,
                        struct nir_shader *const *nir,
                        int nir_count,
-                       const struct radv_nir_compiler_options *options,
-                       bool dump_shader)
+                       const struct radv_nir_compiler_options *options)
 {
 
-       LLVMModuleRef llvm_module = ac_translate_nir_to_llvm(tm, nir, nir_count, shader_info,
-                                                            options, dump_shader);
+       LLVMModuleRef llvm_module;
+
+       llvm_module = ac_translate_nir_to_llvm(tm, nir, nir_count, shader_info,
+                                              options);
 
        ac_compile_llvm_module(tm, llvm_module, binary, config, shader_info,
-                              nir[0]->info.stage, dump_shader, options);
+                              nir[0]->info.stage, options);
 
        for (int i = 0; i < nir_count; ++i)
                ac_fill_shader_info(shader_info, nir[i], options);
@@ -3417,8 +3416,7 @@ radv_compile_gs_copy_shader(LLVMTargetMachineRef tm,
                            struct ac_shader_binary *binary,
                            struct ac_shader_config *config,
                            struct radv_shader_variant_info *shader_info,
-                           const struct radv_nir_compiler_options *options,
-                           bool dump_shader)
+                           const struct radv_nir_compiler_options *options)
 {
        struct radv_shader_context ctx = {0};
        ctx.context = LLVMContextCreate();
@@ -3460,5 +3458,5 @@ radv_compile_gs_copy_shader(LLVMTargetMachineRef tm,
        ac_llvm_finalize_module(&ctx);
 
        ac_compile_llvm_module(tm, ctx.ac.module, binary, config, shader_info,
-                              MESA_SHADER_VERTEX, dump_shader, options);
+                              MESA_SHADER_VERTEX, options);
 }
index 6449c329002f3b3caa807d3f4481625c002ce593..aa12e67cdb75e52cfdc484925f1f96d7d79a2695 100644 (file)
@@ -1687,8 +1687,7 @@ void radv_compile_gs_copy_shader(LLVMTargetMachineRef tm,
                                 struct ac_shader_binary *binary,
                                 struct ac_shader_config *config,
                                 struct radv_shader_variant_info *shader_info,
-                                const struct radv_nir_compiler_options *options,
-                                bool dump_shader);
+                                const struct radv_nir_compiler_options *option);
 
 void radv_compile_nir_shader(LLVMTargetMachineRef tm,
                             struct ac_shader_binary *binary,
@@ -1696,8 +1695,7 @@ void radv_compile_nir_shader(LLVMTargetMachineRef tm,
                             struct radv_shader_variant_info *shader_info,
                             struct nir_shader *const *nir,
                             int nir_count,
-                            const struct radv_nir_compiler_options *options,
-                            bool dump_shader);
+                            const struct radv_nir_compiler_options *options);
 
 /* radv_shader_info.h */
 struct radv_shader_info;
index 2fc7060d6c2e811ff645bee324871366b10cefa4..8a6928e7ccd85e09f1cae34135c7ef37771e3605 100644 (file)
@@ -448,7 +448,6 @@ shader_variant_create(struct radv_device *device,
                      unsigned *code_size_out)
 {
        enum radeon_family chip_family = device->physical_device->rad_info.family;
-       bool dump_shaders = radv_can_dump_shader(device, module);
        enum ac_target_machine_options tm_options = 0;
        struct radv_shader_variant *variant;
        struct ac_shader_binary binary;
@@ -460,7 +459,8 @@ shader_variant_create(struct radv_device *device,
 
        options->family = chip_family;
        options->chip_class = device->physical_device->rad_info.chip_class;
-       options->dump_preoptir = radv_can_dump_shader(device, module) &&
+       options->dump_shader = radv_can_dump_shader(device, module);
+       options->dump_preoptir = options->dump_shader &&
                                 device->instance->debug_flags & RADV_DEBUG_PREOPTIR;
 
        if (options->supports_spill)
@@ -473,11 +473,11 @@ shader_variant_create(struct radv_device *device,
                assert(shader_count == 1);
                radv_compile_gs_copy_shader(tm, *shaders, &binary,
                                            &variant->config, &variant->info,
-                                           options, dump_shaders);
+                                           options);
        } else {
                radv_compile_nir_shader(tm, &binary, &variant->config,
                                        &variant->info, shaders, shader_count,
-                                       options, dump_shaders);
+                                       options);
        }
 
        LLVMDisposeTargetMachine(tm);
index e7478fd56fc25c38e5130d9adcaa14f00bdcf20c..6550c7da1d6bb2d1eed5f9e74ef23fd7e805f605 100644 (file)
@@ -97,6 +97,7 @@ struct radv_nir_compiler_options {
        bool unsafe_math;
        bool supports_spill;
        bool clamp_shadow_reference;
+       bool dump_shader;
        bool dump_preoptir;
        enum radeon_family family;
        enum chip_class chip_class;