}
Fault
-TsunamiCChip::read(MemReqPtr req, uint8_t *data)
+TsunamiCChip::read(MemReqPtr &req, uint8_t *data)
{
DPRINTF(Tsunami, "read va=%#x size=%d\n",
req->vaddr, req->size);
}
Fault
-TsunamiCChip::write(MemReqPtr req, const uint8_t *data)
+TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
{
DPRINTF(Tsunami, "write - va=%#x size=%d \n",
req->vaddr, req->size);
TsunamiCChip(const std::string &name, Tsunami *t,
Addr addr, Addr mask, MemoryController *mmu);
- virtual Fault read(MemReqPtr req, uint8_t *data);
- virtual Fault write(MemReqPtr req, const uint8_t *data);
+ virtual Fault read(MemReqPtr &req, uint8_t *data);
+ virtual Fault write(MemReqPtr &req, const uint8_t *data);
void postDRIR(uint64_t bitvector);
void clearDRIR(uint64_t bitvector);
}
Fault
-TsunamiIO::read(MemReqPtr req, uint8_t *data)
+TsunamiIO::read(MemReqPtr &req, uint8_t *data)
{
DPRINTF(Tsunami, "io read va=%#x size=%d IOPorrt=%#x\n",
req->vaddr, req->size, req->vaddr & 0xfff);
}
Fault
-TsunamiIO::write(MemReqPtr req, const uint8_t *data)
+TsunamiIO::write(MemReqPtr &req, const uint8_t *data)
{
uint8_t dt = *(uint8_t*)data;
uint64_t dt64 = dt;
void set_time(time_t t);
- virtual Fault read(MemReqPtr req, uint8_t *data);
- virtual Fault write(MemReqPtr req, const uint8_t *data);
+ virtual Fault read(MemReqPtr &req, uint8_t *data);
+ virtual Fault write(MemReqPtr &req, const uint8_t *data);
void postPIC(uint8_t bitvector);
void clearPIC(uint8_t bitvector);
}
Fault
-TsunamiPChip::read(MemReqPtr req, uint8_t *data)
+TsunamiPChip::read(MemReqPtr &req, uint8_t *data)
{
DPRINTF(Tsunami, "read va=%#x size=%d\n",
req->vaddr, req->size);
}
Fault
-TsunamiPChip::write(MemReqPtr req, const uint8_t *data)
+TsunamiPChip::write(MemReqPtr &req, const uint8_t *data)
{
DPRINTF(Tsunami, "write - va=%#x size=%d \n",
req->vaddr, req->size);
TsunamiPChip(const std::string &name, Tsunami *t,
Addr addr, Addr mask, MemoryController *mmu);
- virtual Fault read(MemReqPtr req, uint8_t *data);
- virtual Fault write(MemReqPtr req, const uint8_t *data);
+ virtual Fault read(MemReqPtr &req, uint8_t *data);
+ virtual Fault write(MemReqPtr &req, const uint8_t *data);
virtual void serialize(std::ostream &os);
virtual void unserialize(Checkpoint *cp, const std::string §ion);
}
Fault
-TsunamiUart::read(MemReqPtr req, uint8_t *data)
+TsunamiUart::read(MemReqPtr &req, uint8_t *data)
{
Addr daddr = req->paddr & addr_mask;
DPRINTF(TsunamiUart, " read register %#x\n", daddr);
}
Fault
-TsunamiUart::write(MemReqPtr req, const uint8_t *data)
+TsunamiUart::write(MemReqPtr &req, const uint8_t *data)
{
Addr daddr = req->paddr & addr_mask;
TsunamiUart(const std::string &name, SimConsole *c,
Addr addr, Addr mask, MemoryController *mmu);
- Fault read(MemReqPtr req, uint8_t *data);
- Fault write(MemReqPtr req, const uint8_t *data);
+ Fault read(MemReqPtr &req, uint8_t *data);
+ Fault write(MemReqPtr &req, const uint8_t *data);
virtual void serialize(std::ostream &os);