radv/gfx10: Use new uconfig reg index packet for GFX10+.

Otherwise the hardware/firmware seems to not set the registers.

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>

diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
index f724b39b99f19d233f34015ebcd658e2dffb1fa5..b7ee0ff642252cff6c45c04f5c7e9987974e5a49 100644 (file)
--- a/src/amd/vulkan/radv_cmd_buffer.c
+++ b/src/amd/vulkan/radv_cmd_buffer.c
@@ -1956,7 +1956,8 @@ radv_emit_index_buffer(struct radv_cmd_buffer *cmd_buffer)
 
        if (state->index_type != state->last_index_type) {
                if (cmd_buffer->device->physical_device->rad_info.chip_class >= GFX9) {
-                       radeon_set_uconfig_reg_idx(cs, R_03090C_VGT_INDEX_TYPE,
+                       radeon_set_uconfig_reg_idx(cmd_buffer->device->physical_device,
+                                                  cs, R_03090C_VGT_INDEX_TYPE,
                                                   2, state->index_type);
                } else {
                        radeon_emit(cs, PKT3(PKT3_INDEX_TYPE, 0, 0));
@@ -2512,7 +2513,8 @@ si_emit_ia_multi_vgt_param(struct radv_cmd_buffer *cmd_buffer,
 
        if (state->last_ia_multi_vgt_param != ia_multi_vgt_param) {
                if (info->chip_class >= GFX9) {
-                       radeon_set_uconfig_reg_idx(cs,
+                       radeon_set_uconfig_reg_idx(cmd_buffer->device->physical_device,
+                                                  cs,
                                                   R_030960_IA_MULTI_VGT_PARAM,
                                                   4, ia_multi_vgt_param);
                } else if (info->chip_class >= GFX7) {

diff --git a/src/amd/vulkan/radv_cs.h b/src/amd/vulkan/radv_cs.h
index a5792fcc9590aeea8b09ff2f80c46dc4a5f636d6..5f8b59c34cb173d3ac167f3d8fcadfe5e773de66 100644 (file)
--- a/src/amd/vulkan/radv_cs.h
+++ b/src/amd/vulkan/radv_cs.h
@@ -28,6 +28,7 @@
 #include <string.h>
 #include <stdint.h>
 #include <assert.h>
+#include "radv_private.h"
 #include "sid.h"
 
 static inline unsigned radeon_check_space(struct radeon_winsys *ws,
@@ -111,13 +112,21 @@ static inline void radeon_set_uconfig_reg(struct radeon_cmdbuf *cs, unsigned reg
        radeon_emit(cs, value);
 }
 
-static inline void radeon_set_uconfig_reg_idx(struct radeon_cmdbuf *cs,
+static inline void radeon_set_uconfig_reg_idx(const struct radv_physical_device *pdevice,
+                                             struct radeon_cmdbuf *cs,
                                              unsigned reg, unsigned idx,
                                              unsigned value)
 {
        assert(reg >= CIK_UCONFIG_REG_OFFSET && reg < CIK_UCONFIG_REG_END);
        assert(cs->cdw + 3 <= cs->max_dw);
-       radeon_emit(cs, PKT3(PKT3_SET_UCONFIG_REG, 1, 0));
+       assert(idx);
+
+       unsigned opcode = PKT3_SET_UCONFIG_REG_INDEX;
+       if (pdevice->rad_info.chip_class < GFX9 ||
+           (pdevice->rad_info.chip_class == GFX9 && pdevice->rad_info.me_fw_version < 26))
+               opcode = PKT3_SET_UCONFIG_REG;
+
+       radeon_emit(cs, PKT3(opcode, 1, 0));
        radeon_emit(cs, (reg - CIK_UCONFIG_REG_OFFSET) >> 2 | (idx << 28));
        radeon_emit(cs, value);
 }

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 5c844695c20b227cdee0c6ba54a67eb70e227f61..7c5c5842f35f63591ff77ab5c7cd0cbc5766a28d 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3588,7 +3588,8 @@ radv_pipeline_generate_pm4(struct radv_pipeline *pipeline,
        radeon_set_context_reg(ctx_cs, R_028B54_VGT_SHADER_STAGES_EN, radv_compute_vgt_shader_stages_en(pipeline));
 
        if (pipeline->device->physical_device->rad_info.chip_class >= GFX7) {
-               radeon_set_uconfig_reg_idx(cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim);
+               radeon_set_uconfig_reg_idx(pipeline->device->physical_device,
+                                          cs, R_030908_VGT_PRIMITIVE_TYPE, 1, prim);
        } else {
                radeon_set_config_reg(cs, R_008958_VGT_PRIMITIVE_TYPE, prim);
        }

diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index df9d2030a3ad7e2f84e80780887b3fd4067c2f62..3fa71905adfe917a30781140c60e86edc6335bff 100644 (file)
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -62,7 +62,7 @@
 #include "ac_llvm_util.h"
 #include "radv_descriptor_set.h"
 #include "radv_extensions.h"
-#include "radv_cs.h"
+#include "sid.h"
 
 #include <llvm-c/TargetMachine.h>