integration/builder: generate shadow_base address to mem.h and csv
authorMateusz Holenko <mholenko@antmicro.com>
Wed, 5 Jun 2019 15:35:47 +0000 (17:35 +0200)
committerMateusz Holenko <mholenko@antmicro.com>
Wed, 5 Jun 2019 15:37:09 +0000 (17:37 +0200)
litex/soc/integration/builder.py
litex/soc/integration/cpu_interface.py

index 0495ec2bcb7cf91a8d2405cacf26eab1770c4513..8aecd3912731a10aa0507b88af9c310ab156c15d 100755 (executable)
@@ -58,6 +58,7 @@ class Builder:
         cpu_type = self.soc.cpu_type
         memory_regions = self.soc.get_memory_regions()
         flash_boot_address = getattr(self.soc, "flash_boot_address", None)
+        shadow_base = getattr(self.soc, "shadow_base", None)
         csr_regions = self.soc.get_csr_regions()
         constants = self.soc.get_constants()
 
@@ -102,7 +103,7 @@ class Builder:
 
         write_to_file(
             os.path.join(generated_dir, "mem.h"),
-            cpu_interface.get_mem_header(memory_regions, flash_boot_address))
+            cpu_interface.get_mem_header(memory_regions, flash_boot_address, shadow_base))
         write_to_file(
             os.path.join(generated_dir, "csr.h"),
             cpu_interface.get_csr_header(csr_regions, constants))
@@ -120,6 +121,10 @@ class Builder:
         csr_regions = self.soc.get_csr_regions()
         constants = self.soc.get_constants()
 
+        shadow_base = getattr(self.soc, "shadow_base", None)
+        if shadow_base:
+            constants.append(('shadow_base',  shadow_base))
+
         csr_dir = os.path.dirname(os.path.realpath(self.csr_csv))
         os.makedirs(csr_dir, exist_ok=True)
         write_to_file(
index d20f06ebe9fd2e60a70b6f6b0389ae46f50117e3..a09751ad359d0f696ad9da31d0356a4cffc75783 100644 (file)
@@ -70,13 +70,15 @@ def get_linker_regions(regions):
     return r
 
 
-def get_mem_header(regions, flash_boot_address):
+def get_mem_header(regions, flash_boot_address, shadow_base):
     r = generated_banner("//")
     r += "#ifndef __GENERATED_MEM_H\n#define __GENERATED_MEM_H\n\n"
     for name, base, size in regions:
         r += "#define {name}_BASE 0x{base:08x}L\n#define {name}_SIZE 0x{size:08x}\n\n".format(name=name.upper(), base=base, size=size)
     if flash_boot_address is not None:
         r += "#define FLASH_BOOT_ADDRESS 0x{:08x}L\n\n".format(flash_boot_address)
+    if shadow_base is not None:
+        r += "#define SHADOW_BASE 0x{:08x}L\n\n".format(shadow_base)
     r += "#endif\n"
     return r