Remove extraneous synth_xilinx call
authorEddie Hung <eddie@fpgeh.com>
Fri, 13 Dec 2019 03:00:26 +0000 (19:00 -0800)
committerEddie Hung <eddie@fpgeh.com>
Fri, 13 Dec 2019 03:00:26 +0000 (19:00 -0800)
tests/arch/xilinx/lutram.ys

index 36367eff1abf4f4135fe80170e20f8cc0ca58f61..a2ede75a51306090e774abe1f8a6415abd96628f 100644 (file)
@@ -62,7 +62,6 @@ read_verilog ../common/lutram.v
 hierarchy -top lutram_1w3r
 proc
 memory -nomap
-synth_xilinx
 equiv_opt -run :prove -map +/xilinx/cells_sim.v synth_xilinx
 memory
 opt -full
@@ -83,7 +82,6 @@ read_verilog ../common/lutram.v
 hierarchy -top lutram_1w3r -chparam A_WIDTH 6
 proc
 memory -nomap
-synth_xilinx
 equiv_opt -run :prove -map +/xilinx/cells_sim.v synth_xilinx
 memory
 opt -full