i965/blorp: remove dependency to compression control state

Effectively only the mask control bit gets altered for the single
addition in question and hence there is no real need to use a
fresh state control level for it -- that is more useful when
multiple intructions share the same mask and compression settings.

This is a preparation step for removing the explicit compression
control modifiers in the blit compiler. After this patch there
are no nested state control levels making the constant nature of
the compression settings more apparent.

No regressions on IVB (piglit quick + unit tests).

v2 (Matt, Ian): use temporary variable instead of assigning
                directly on the same line with a function call.

Signed-off-by: Topi Pohjolainen <topi.pohjolainen@intel.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
index 112a307c6e433579e14254d28202333ac6777dea..820a8faa7a230991a7f79a0c46e6bda047b93ec9 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp
@@ -1407,10 +1407,9 @@ brw_blorp_blit_program::kill_if_outside_dst_rect()
    brw_CMP(&func, null32, BRW_CONDITIONAL_L, Y, dst_y1);
 
    brw_set_predicate_control(&func, BRW_PREDICATE_NONE);
-   brw_push_insn_state(&func);
-   brw_set_mask_control(&func, BRW_MASK_DISABLE);
-   brw_AND(&func, g1, f0, g1);
-   brw_pop_insn_state(&func);
+
+   struct brw_instruction *inst = brw_AND(&func, g1, f0, g1);
+   inst->header.mask_control = BRW_MASK_DISABLE;
 }
 
 /**