broadcom/xml: Fix address packing for address with >= 8 alignment bits.

We were handing the intra-byte padding fine, but with a 24-bit address
(bottom 8 bits implied 0) we would end up off by 8 bytes in our shift,
impacting vc5's load/store general packets (all other packets we have had
<8 bits of padding).

diff --git a/src/broadcom/cle/gen_pack_header.py b/src/broadcom/cle/gen_pack_header.py
index d458c2b1c40e3e4e4a284f342f6c2be91118d6a3..78ad9ad31a46d9fd7fdd71d1fefc253b7a0ca2e9 100644 (file)
--- a/src/broadcom/cle/gen_pack_header.py
+++ b/src/broadcom/cle/gen_pack_header.py
@@ -279,11 +279,13 @@ class Group(object):
                 field_byte_start = (field.start // 8) * 8
                 start -= field_byte_start
                 end -= field_byte_start
+                extra_shift = 0
 
                 if field.type == "mbo":
                     s = "__gen_mbo(%d, %d)" % \
                         (start, end)
                 elif field.type == "address":
+                    extra_shift = (31 - (end - start)) // 8 * 8
                     s = "__gen_address_offset(&values->%s)" % byte.address.name
                 elif field.type == "uint":
                     s = "__gen_uint(values->%s, %d, %d)" % \
@@ -317,8 +319,9 @@ class Group(object):
                     s = None
 
                 if not s == None:
-                    if byte_start - field_byte_start != 0:
-                        s = "%s >> %d" % (s, byte_start - field_byte_start)
+                    shift = byte_start - field_byte_start + extra_shift
+                    if shift:
+                        s = "%s >> %d" % (s, shift)
 
                     if field == byte.fields[-1]:
                         print("%s %s;" % (prefix, s))