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add litex-hub hyperram
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 23 Oct 2020 19:00:33 +0000 (20:00 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Fri, 23 Oct 2020 19:00:33 +0000 (20:00 +0100)
shakti/m_class/HyperRAM.mdwn patch | blob | history

diff --git a/shakti/m_class/HyperRAM.mdwn b/shakti/m_class/HyperRAM.mdwn
index f0a2648b714724aee7141e0d63c999f8fcc7679c..72813d4133166b6037b00771333b198e5ef6c538 100644 (file)
--- a/shakti/m_class/HyperRAM.mdwn
+++ b/shakti/m_class/HyperRAM.mdwn
@@ -3,3 +3,4 @@
 * <https://github.com/blackmesalabs/hyperram>
 * Symbiotic EDA have a DDR variant that they can make libre for the
   right $
+* Litex Hub <https://github.com/litex-hub/litehyperbus> 
http://libre-riscv.org ikiwiki