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author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Thu, 30 Jun 2022 21:59:59 +0000
(22:59 +0100)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Thu, 30 Jun 2022 21:59:59 +0000
(22:59 +0100)
openpower/sv.mdwn
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diff --git
a/openpower/sv.mdwn
b/openpower/sv.mdwn
index 1cf0a31d38c038fe491747594e0aca57b2153169..69460d8bd1b08b464cc5b6ef9f80b21d4b498ea8 100644
(file)
--- a/
openpower/sv.mdwn
+++ b/
openpower/sv.mdwn
@@
-162,7
+162,7
@@
Scalar Instructions:
* Twin targetted instructions (two registers out, one implicit, just like
Load-with-Update).
Explanation of the rules for twin register targets
- (implicit RS, FRS) explained in SVP64 [[sv
/sv
p64/appendix]]
+ (implicit RS, FRS) explained in SVP64 [[svp64/appendix]]
- [[isa/svfixedarith]]
- [[isa/svfparith]]
- [[sv/biginteger]] Operations that help with big arithmetic